#ifndef __BCM63XX_I2S_H
#define __BCM63XX_I2S_H
#define I2S_DESC_FIFO_DEPTH …
#define I2S_MISC_CFG …
#define I2S_PAD_LVL_LOOP_DIS_MASK …
#define I2S_PAD_LVL_LOOP_DIS_ENABLE …
#define I2S_TX_ENABLE_MASK …
#define I2S_TX_ENABLE …
#define I2S_TX_OUT_R …
#define I2S_TX_DATA_ALIGNMENT …
#define I2S_TX_DATA_ENABLE …
#define I2S_TX_CLOCK_ENABLE …
#define I2S_TX_DESC_OFF_LEVEL_SHIFT …
#define I2S_TX_DESC_OFF_LEVEL_MASK …
#define I2S_TX_DESC_IFF_LEVEL_SHIFT …
#define I2S_TX_DESC_IFF_LEVEL_MASK …
#define I2S_TX_DESC_OFF_INTR_EN_MSK …
#define I2S_TX_DESC_OFF_INTR_EN …
#define I2S_TX_CFG …
#define I2S_TX_IRQ_CTL …
#define I2S_TX_IRQ_EN …
#define I2S_TX_IRQ_IFF_THLD …
#define I2S_TX_IRQ_OFF_THLD …
#define I2S_TX_DESC_IFF_ADDR …
#define I2S_TX_DESC_IFF_LEN …
#define I2S_TX_DESC_OFF_ADDR …
#define I2S_TX_DESC_OFF_LEN …
#define I2S_TX_CFG_2 …
#define I2S_TX_SLAVE_MODE_SHIFT …
#define I2S_TX_SLAVE_MODE_MASK …
#define I2S_TX_SLAVE_MODE …
#define I2S_TX_MASTER_MODE …
#define I2S_TX_INTR_MASK …
#define I2S_RX_ENABLE_MASK …
#define I2S_RX_ENABLE …
#define I2S_RX_IN_R …
#define I2S_RX_DATA_ALIGNMENT …
#define I2S_RX_CLOCK_ENABLE …
#define I2S_RX_DESC_OFF_LEVEL_SHIFT …
#define I2S_RX_DESC_OFF_LEVEL_MASK …
#define I2S_RX_DESC_IFF_LEVEL_SHIFT …
#define I2S_RX_DESC_IFF_LEVEL_MASK …
#define I2S_RX_DESC_OFF_INTR_EN_MSK …
#define I2S_RX_DESC_OFF_INTR_EN …
#define I2S_RX_CFG …
#define I2S_RX_IRQ_CTL …
#define I2S_RX_IRQ_EN …
#define I2S_RX_IRQ_IFF_THLD …
#define I2S_RX_IRQ_OFF_THLD …
#define I2S_RX_DESC_IFF_ADDR …
#define I2S_RX_DESC_IFF_LEN …
#define I2S_RX_DESC_OFF_ADDR …
#define I2S_RX_DESC_OFF_LEN …
#define I2S_RX_CFG_2 …
#define I2S_RX_SLAVE_MODE_SHIFT …
#define I2S_RX_SLAVE_MODE_MASK …
#define I2S_RX_SLAVE_MODE …
#define I2S_RX_MASTER_MODE …
#define I2S_RX_INTR_MASK …
#define I2S_REG_MAX …
struct bcm_i2s_priv { … };
extern int bcm63xx_soc_platform_probe(struct platform_device *pdev,
struct bcm_i2s_priv *i2s_priv);
extern int bcm63xx_soc_platform_remove(struct platform_device *pdev);
#endif