linux/sound/soc/intel/skylake/skl-i2s.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 *  skl-i2s.h - i2s blob mapping
 *
 *  Copyright (C) 2017 Intel Corp
 *  Author: Subhransu S. Prusty < [email protected]>
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */

#ifndef __SOUND_SOC_SKL_I2S_H
#define __SOUND_SOC_SKL_I2S_H

#define SKL_I2S_MAX_TIME_SLOTS …
#define SKL_MCLK_DIV_CLK_SRC_MASK …

#define SKL_MNDSS_DIV_CLK_SRC_MASK …
#define SKL_SHIFT(x) …
#define SKL_MCLK_DIV_RATIO_MASK …

#define is_legacy_blob(x) …
#define ext_to_legacy_blob(i2s_config_blob_ext) …

#define get_clk_src(mclk, mask) …
struct skl_i2s_config { … } __packed;

struct skl_i2s_config_mclk { … };

struct skl_i2s_config_mclk_ext { … } __packed;

struct skl_i2s_config_blob_signature { … } __packed;

struct skl_i2s_config_blob_header { … };

/**
 * struct skl_i2s_config_blob_legacy - Structure defines I2S Gateway
 * configuration legacy blob
 *
 * @gtw_attr:		Gateway attribute for the I2S Gateway
 * @tdm_ts_group:	TDM slot mapping against channels in the Gateway.
 * @i2s_cfg:		I2S HW registers
 * @mclk:		MCLK clock source and divider values
 */
struct skl_i2s_config_blob_legacy { … };

struct skl_i2s_config_blob_ext { … } __packed;
#endif /* __SOUND_SOC_SKL_I2S_H */