linux/sound/soc/intel/skylake/bxt-sst.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 *  bxt-sst.c - DSP library functions for BXT platform
 *
 *  Copyright (C) 2015-16 Intel Corp
 *  Author:Rafal Redzimski <[email protected]>
 *	   Jeeja KP <[email protected]>
 */

#include <linux/module.h>
#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/device.h>

#include "../common/sst-dsp.h"
#include "../common/sst-dsp-priv.h"
#include "skl.h"

#define BXT_BASEFW_TIMEOUT …
#define BXT_ROM_INIT_TIMEOUT …
#define BXT_IPC_PURGE_FW …

#define BXT_ROM_INIT …
#define BXT_ADSP_SRAM0_BASE …

/* Firmware status window */
#define BXT_ADSP_FW_STATUS …
#define BXT_ADSP_ERROR_CODE …

#define BXT_ADSP_SRAM1_BASE …

#define BXT_INSTANCE_ID …
#define BXT_BASE_FW_MODULE_ID …

#define BXT_ADSP_FW_BIN_HDR_OFFSET …

/* Delay before scheduling D0i3 entry */
#define BXT_D0I3_DELAY …

static unsigned int bxt_get_errorcode(struct sst_dsp *ctx)
{ … }

static int
bxt_load_library(struct sst_dsp *ctx, struct skl_lib_info *linfo, int lib_count)
{ … }

/*
 * First boot sequence has some extra steps. Core 0 waits for power
 * status on core 1, so power up core 1 also momentarily, keep it in
 * reset/stall and then turn it off
 */
static int sst_bxt_prepare_fw(struct sst_dsp *ctx,
			const void *fwdata, u32 fwsize)
{ … }

static int sst_transfer_fw_host_dma(struct sst_dsp *ctx)
{ … }

static int bxt_load_base_firmware(struct sst_dsp *ctx)
{ … }

/*
 * Decide the D0i3 state that can be targeted based on the usecase
 * ref counts and DSP state
 *
 * Decision Matrix:  (X= dont care; state = target state)
 *
 * DSP state != SKL_DSP_RUNNING ; state = no d0i3
 *
 * DSP state == SKL_DSP_RUNNING , the following matrix applies
 * non_d0i3 >0; streaming =X; non_streaming =X; state = no d0i3
 * non_d0i3 =X; streaming =0; non_streaming =0; state = no d0i3
 * non_d0i3 =0; streaming >0; non_streaming =X; state = streaming d0i3
 * non_d0i3 =0; streaming =0; non_streaming =X; state = non-streaming d0i3
 */
static int bxt_d0i3_target_state(struct sst_dsp *ctx)
{ … }

static void bxt_set_dsp_D0i3(struct work_struct *work)
{ … }

static int bxt_schedule_dsp_D0i3(struct sst_dsp *ctx)
{ … }

static int bxt_set_dsp_D0i0(struct sst_dsp *ctx)
{ … }

static int bxt_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id)
{ … }

static int bxt_set_dsp_D3(struct sst_dsp *ctx, unsigned int core_id)
{ … }

static const struct skl_dsp_fw_ops bxt_fw_ops = …;

static struct sst_ops skl_ops = …;

static struct sst_dsp_device skl_dev = …;

int bxt_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq,
			const char *fw_name, struct skl_dsp_loader_ops dsp_ops,
			struct skl_dev **dsp)
{ … }
EXPORT_SYMBOL_GPL(…);

int bxt_sst_init_fw(struct device *dev, struct skl_dev *skl)
{ … }
EXPORT_SYMBOL_GPL(…);

void bxt_sst_dsp_cleanup(struct device *dev, struct skl_dev *skl)
{ … }
EXPORT_SYMBOL_GPL(…);

MODULE_LICENSE(…) …;
MODULE_DESCRIPTION(…) …;