linux/drivers/clk/samsung/clk-exynos-audss.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 * Author: Padmavathi Venna <[email protected]>
 *
 * Common Clock Framework support for Audio Subsystem Clock Controller.
*/

#include <linux/slab.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>

#include <dt-bindings/clock/exynos-audss-clk.h>

static DEFINE_SPINLOCK(lock);
static void __iomem *reg_base;
static struct clk_hw_onecell_data *clk_data;
/*
 * On Exynos5420 this will be a clock which has to be enabled before any
 * access to audss registers. Typically a child of EPLL.
 *
 * On other platforms this will be -ENODEV.
 */
static struct clk *epll;

#define ASS_CLK_SRC
#define ASS_CLK_DIV
#define ASS_CLK_GATE

static unsigned long reg_save[][2] =;

static int __maybe_unused exynos_audss_clk_suspend(struct device *dev)
{}

static int __maybe_unused exynos_audss_clk_resume(struct device *dev)
{}

struct exynos_audss_clk_drvdata {};

static const struct exynos_audss_clk_drvdata exynos4210_drvdata =;

static const struct exynos_audss_clk_drvdata exynos5410_drvdata =;

static const struct exynos_audss_clk_drvdata exynos5420_drvdata =;

static const struct of_device_id exynos_audss_clk_of_match[] =;
MODULE_DEVICE_TABLE(of, exynos_audss_clk_of_match);

static void exynos_audss_clk_teardown(void)
{}

/* register exynos_audss clocks */
static int exynos_audss_clk_probe(struct platform_device *pdev)
{}

static void exynos_audss_clk_remove(struct platform_device *pdev)
{}

static const struct dev_pm_ops exynos_audss_clk_pm_ops =;

static struct platform_driver exynos_audss_clk_driver =;

module_platform_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();
MODULE_ALIAS();