#ifndef _MESON_AXG_FIFO_H
#define _MESON_AXG_FIFO_H
struct clk;
struct platform_device;
struct reg_field;
struct regmap;
struct regmap_field;
struct reset_control;
struct snd_soc_component_driver;
struct snd_soc_dai;
struct snd_soc_dai_driver;
struct snd_soc_pcm_runtime;
#define AXG_FIFO_CH_MAX …
#define AXG_FIFO_FORMATS …
#define AXG_FIFO_BURST …
#define FIFO_INT_ADDR_FINISH …
#define FIFO_INT_ADDR_INT …
#define FIFO_INT_COUNT_REPEAT …
#define FIFO_INT_COUNT_ONCE …
#define FIFO_INT_FIFO_ZERO …
#define FIFO_INT_FIFO_DEPTH …
#define FIFO_INT_MASK …
#define FIFO_CTRL0 …
#define CTRL0_DMA_EN …
#define CTRL0_INT_EN …
#define CTRL0_SEL_MASK …
#define CTRL0_SEL_SHIFT …
#define FIFO_CTRL1 …
#define CTRL1_INT_CLR …
#define CTRL1_STATUS2_SEL …
#define STATUS2_SEL_DDR_READ …
#define CTRL1_FRDDR_DEPTH …
#define FIFO_START_ADDR …
#define FIFO_FINISH_ADDR …
#define FIFO_INT_ADDR …
#define FIFO_STATUS1 …
#define STATUS1_INT_STS …
#define FIFO_STATUS2 …
#define FIFO_INIT_ADDR …
#define FIFO_CTRL2 …
struct axg_fifo { … };
struct axg_fifo_match_data { … };
int axg_fifo_pcm_open(struct snd_soc_component *component,
struct snd_pcm_substream *ss);
int axg_fifo_pcm_close(struct snd_soc_component *component,
struct snd_pcm_substream *ss);
int axg_fifo_pcm_hw_params(struct snd_soc_component *component,
struct snd_pcm_substream *ss,
struct snd_pcm_hw_params *params);
int g12a_fifo_pcm_hw_params(struct snd_soc_component *component,
struct snd_pcm_substream *ss,
struct snd_pcm_hw_params *params);
int axg_fifo_pcm_hw_free(struct snd_soc_component *component,
struct snd_pcm_substream *ss);
snd_pcm_uframes_t axg_fifo_pcm_pointer(struct snd_soc_component *component,
struct snd_pcm_substream *ss);
int axg_fifo_pcm_trigger(struct snd_soc_component *component,
struct snd_pcm_substream *ss, int cmd);
int axg_fifo_pcm_new(struct snd_soc_pcm_runtime *rtd, unsigned int type);
int axg_fifo_probe(struct platform_device *pdev);
#endif