/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef __SND_AR_TOKENS_H__ #define __SND_AR_TOKENS_H__ #define APM_SUB_GRAPH_PERF_MODE_LOW_POWER … #define APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY … #define APM_SUB_GRAPH_DIRECTION_TX … #define APM_SUB_GRAPH_DIRECTION_RX … /** Scenario ID Audio Playback */ #define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK … /* Scenario ID Audio Record */ #define APM_SUB_GRAPH_SID_AUDIO_RECORD … /* Scenario ID Voice call. */ #define APM_SUB_GRAPH_SID_VOICE_CALL … /* container capability ID Pre/Post Processing (PP) */ #define APM_CONTAINER_CAP_ID_PP … /* container capability ID Compression/Decompression (CD) */ #define APM_CONTAINER_CAP_ID_CD … /* container capability ID End Point(EP) */ #define APM_CONTAINER_CAP_ID_EP … /* container capability ID Offload (OLC) */ #define APM_CONTAINER_CAP_ID_OLC … /* container graph position Stream */ #define APM_CONT_GRAPH_POS_STREAM … /* container graph position Per Stream Per Device*/ #define APM_CONT_GRAPH_POS_PER_STR_PER_DEV … /* container graph position Stream-Device */ #define APM_CONT_GRAPH_POS_STR_DEV … /* container graph position Global Device */ #define APM_CONT_GRAPH_POS_GLOBAL_DEV … #define APM_PROC_DOMAIN_ID_MDSP … #define APM_PROC_DOMAIN_ID_ADSP … #define APM_PROC_DOMAIN_ID_SDSP … #define APM_PROC_DOMAIN_ID_CDSP … #define PCM_INTERLEAVED … #define PCM_DEINTERLEAVED_PACKED … #define PCM_DEINTERLEAVED_UNPACKED … #define AR_I2S_WS_SRC_EXTERNAL … #define AR_I2S_WS_SRC_INTERNAL … enum ar_event_types { … }; /* * Kcontrol IDs */ #define SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX … #define SND_SOC_AR_TPLG_VOL_CTL … /** * %AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: Sub Graph Instance Id * * %AR_TKN_U32_SUB_GRAPH_PERF_MODE: Performance mode of subgraph * APM_SUB_GRAPH_PERF_MODE_LOW_POWER = 1, * APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY = 2 * * %AR_TKN_U32_SUB_GRAPH_DIRECTION: Direction of subgraph * APM_SUB_GRAPH_DIRECTION_TX = 1, * APM_SUB_GRAPH_DIRECTION_RX = 2 * * %AR_TKN_U32_SUB_GRAPH_SCENARIO_ID: Scenario ID for subgraph * APM_SUB_GRAPH_SID_AUDIO_PLAYBACK = 1, * APM_SUB_GRAPH_SID_AUDIO_RECORD = 2, * APM_SUB_GRAPH_SID_VOICE_CALL = 3 * * %AR_TKN_U32_CONTAINER_INSTANCE_ID: Container Instance ID * * %AR_TKN_U32_CONTAINER_CAPABILITY_ID: Container capability ID * APM_CONTAINER_CAP_ID_PP = 1, * APM_CONTAINER_CAP_ID_CD = 2, * APM_CONTAINER_CAP_ID_EP = 3, * APM_CONTAINER_CAP_ID_OLC = 4 * * %AR_TKN_U32_CONTAINER_STACK_SIZE: Stack size in the container. * * %AR_TKN_U32_CONTAINER_GRAPH_POS: Graph Position * APM_CONT_GRAPH_POS_STREAM = 1, * APM_CONT_GRAPH_POS_PER_STR_PER_DEV = 2, * APM_CONT_GRAPH_POS_STR_DEV = 3, * APM_CONT_GRAPH_POS_GLOBAL_DEV = 4 * * %AR_TKN_U32_CONTAINER_PROC_DOMAIN: Processor domain of container * APM_PROC_DOMAIN_ID_MDSP = 1, * APM_PROC_DOMAIN_ID_ADSP = 2, * APM_PROC_DOMAIN_ID_SDSP = 4, * APM_PROC_DOMAIN_ID_CDSP = 5 * * %AR_TKN_U32_MODULE_ID: Module ID * * %AR_TKN_U32_MODULE_INSTANCE_ID: Module Instance ID. * * %AR_TKN_U32_MODULE_MAX_IP_PORTS: Module maximum input ports * * %AR_TKN_U32_MODULE_MAX_OP_PORTS: Module maximum output ports. * * %AR_TKN_U32_MODULE_IN_PORTS: Number of in ports * * %AR_TKN_U32_MODULE_OUT_PORTS: Number of out ports. * * %AR_TKN_U32_MODULE_SRC_OP_PORT_ID: Source module output port ID * * %AR_TKN_U32_MODULE_DST_IN_PORT_ID: Destination module input port ID * * %AR_TKN_U32_MODULE_HW_IF_IDX: Interface index types for I2S/LPAIF * * %AR_TKN_U32_MODULE_HW_IF_TYPE: Interface type * LPAIF = 0, * LPAIF_RXTX = 1, * LPAIF_WSA = 2, * LPAIF_VA = 3, * LPAIF_AXI = 4 * * %AR_TKN_U32_MODULE_FMT_INTERLEAVE: PCM Interleaving * PCM_INTERLEAVED = 1, * PCM_DEINTERLEAVED_PACKED = 2, * PCM_DEINTERLEAVED_UNPACKED = 3 * * %AR_TKN_U32_MODULE_FMT_DATA: data format * FIXED POINT = 1, * IEC60958 PACKETIZED = 3, * IEC60958 PACKETIZED NON LINEAR = 8, * COMPR OVER PCM PACKETIZED = 7, * IEC61937 PACKETIZED = 2, * GENERIC COMPRESSED = 5 * * %AR_TKN_U32_MODULE_FMT_SAMPLE_RATE: sample rate * * %AR_TKN_U32_MODULE_FMT_BIT_DEPTH: bit depth * * %AR_TKN_U32_MODULE_SD_LINE_IDX: I2S serial data line idx * I2S_SD0 = 1, * I2S_SD1 = 2, * I2S_SD2 = 3, * I2S_SD3 = 4, * I2S_QUAD01 = 5, * I2S_QUAD23 = 6, * I2S_6CHS = 7, * I2S_8CHS = 8 * * %AR_TKN_U32_MODULE_WS_SRC: Word Select Source * AR_I2S_WS_SRC_EXTERNAL = 0, * AR_I2S_WS_SRC_INTERNAL = 1, * * %AR_TKN_U32_MODULE_FRAME_SZ_FACTOR: Frame size factor * * %AR_TKN_U32_MODULE_LOG_CODE: Log Module Code * * %AR_TKN_U32_MODULE_LOG_TAP_POINT_ID: logging tap point of this module * * %AR_TKN_U32_MODULE_LOG_MODE: logging mode * LOG_WAIT = 0, * LOG_IMMEDIATELY = 1 * * %AR_TKN_DAI_INDEX: dai index * */ /* DAI Tokens */ #define AR_TKN_DAI_INDEX … /* SUB GRAPH Tokens */ #define AR_TKN_U32_SUB_GRAPH_INSTANCE_ID … #define AR_TKN_U32_SUB_GRAPH_PERF_MODE … #define AR_TKN_U32_SUB_GRAPH_DIRECTION … #define AR_TKN_U32_SUB_GRAPH_SCENARIO_ID … /* Container Tokens */ #define AR_TKN_U32_CONTAINER_INSTANCE_ID … #define AR_TKN_U32_CONTAINER_CAPABILITY_ID … #define AR_TKN_U32_CONTAINER_STACK_SIZE … #define AR_TKN_U32_CONTAINER_GRAPH_POS … #define AR_TKN_U32_CONTAINER_PROC_DOMAIN … /* Module Tokens */ #define AR_TKN_U32_MODULE_ID … #define AR_TKN_U32_MODULE_INSTANCE_ID … #define AR_TKN_U32_MODULE_MAX_IP_PORTS … #define AR_TKN_U32_MODULE_MAX_OP_PORTS … #define AR_TKN_U32_MODULE_IN_PORTS … #define AR_TKN_U32_MODULE_OUT_PORTS … #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID … #define AR_TKN_U32_MODULE_DST_IN_PORT_ID … #define AR_TKN_U32_MODULE_SRC_INSTANCE_ID … #define AR_TKN_U32_MODULE_DST_INSTANCE_ID … #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID1 … #define AR_TKN_U32_MODULE_DST_IN_PORT_ID1 … #define AR_TKN_U32_MODULE_DST_INSTANCE_ID1 … #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID2 … #define AR_TKN_U32_MODULE_DST_IN_PORT_ID2 … #define AR_TKN_U32_MODULE_DST_INSTANCE_ID2 … #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID3 … #define AR_TKN_U32_MODULE_DST_IN_PORT_ID3 … #define AR_TKN_U32_MODULE_DST_INSTANCE_ID3 … #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID4 … #define AR_TKN_U32_MODULE_DST_IN_PORT_ID4 … #define AR_TKN_U32_MODULE_DST_INSTANCE_ID4 … #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID5 … #define AR_TKN_U32_MODULE_DST_IN_PORT_ID5 … #define AR_TKN_U32_MODULE_DST_INSTANCE_ID5 … #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID6 … #define AR_TKN_U32_MODULE_DST_IN_PORT_ID6 … #define AR_TKN_U32_MODULE_DST_INSTANCE_ID6 … #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID7 … #define AR_TKN_U32_MODULE_DST_IN_PORT_ID7 … #define AR_TKN_U32_MODULE_DST_INSTANCE_ID7 … #define AR_TKN_U32_MODULE_HW_IF_IDX … #define AR_TKN_U32_MODULE_HW_IF_TYPE … #define AR_TKN_U32_MODULE_FMT_INTERLEAVE … #define AR_TKN_U32_MODULE_FMT_DATA … #define AR_TKN_U32_MODULE_FMT_SAMPLE_RATE … #define AR_TKN_U32_MODULE_FMT_BIT_DEPTH … #define AR_TKN_U32_MODULE_SD_LINE_IDX … #define AR_TKN_U32_MODULE_WS_SRC … #define AR_TKN_U32_MODULE_FRAME_SZ_FACTOR … #define AR_TKN_U32_MODULE_LOG_CODE … #define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID … #define AR_TKN_U32_MODULE_LOG_MODE … #endif /* __SND_AR_TOKENS_H__ */
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