linux/sound/soc/sof/ops.h

/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
/*
 * This file is provided under a dual BSD/GPLv2 license.  When using or
 * redistributing this file, you may do so under either license.
 *
 * Copyright(c) 2018 Intel Corporation
 *
 * Author: Liam Girdwood <[email protected]>
 */

#ifndef __SOUND_SOC_SOF_IO_H
#define __SOUND_SOC_SOF_IO_H

#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <sound/pcm.h>
#include "sof-priv.h"

#define sof_ops(sdev)

static inline int sof_ops_init(struct snd_sof_dev *sdev)
{}

static inline void sof_ops_free(struct snd_sof_dev *sdev)
{}

/* Mandatory operations are verified during probing */

/* init */
static inline int snd_sof_probe_early(struct snd_sof_dev *sdev)
{}

static inline int snd_sof_probe(struct snd_sof_dev *sdev)
{}

static inline void snd_sof_remove(struct snd_sof_dev *sdev)
{}

static inline void snd_sof_remove_late(struct snd_sof_dev *sdev)
{}

static inline int snd_sof_shutdown(struct snd_sof_dev *sdev)
{}

/* control */

/*
 * snd_sof_dsp_run returns the core mask of the cores that are available
 * after successful fw boot
 */
static inline int snd_sof_dsp_run(struct snd_sof_dev *sdev)
{}

static inline int snd_sof_dsp_stall(struct snd_sof_dev *sdev, unsigned int core_mask)
{}

static inline int snd_sof_dsp_reset(struct snd_sof_dev *sdev)
{}

/* dsp core get/put */
static inline int snd_sof_dsp_core_get(struct snd_sof_dev *sdev, int core)
{}

static inline int snd_sof_dsp_core_put(struct snd_sof_dev *sdev, int core)
{}

/* pre/post fw load */
static inline int snd_sof_dsp_pre_fw_run(struct snd_sof_dev *sdev)
{}

static inline int snd_sof_dsp_post_fw_run(struct snd_sof_dev *sdev)
{}

/* parse platform specific extended manifest */
static inline int snd_sof_dsp_parse_platform_ext_manifest(struct snd_sof_dev *sdev,
							  const struct sof_ext_man_elem_header *hdr)
{}

/* misc */

/**
 * snd_sof_dsp_get_bar_index - Maps a section type with a BAR index
 *
 * @sdev: sof device
 * @type: section type as described by snd_sof_fw_blk_type
 *
 * Returns the corresponding BAR index (a positive integer) or -EINVAL
 * in case there is no mapping
 */
static inline int snd_sof_dsp_get_bar_index(struct snd_sof_dev *sdev, u32 type)
{}

static inline int snd_sof_dsp_get_mailbox_offset(struct snd_sof_dev *sdev)
{}

static inline int snd_sof_dsp_get_window_offset(struct snd_sof_dev *sdev,
						u32 id)
{}
/* power management */
static inline int snd_sof_dsp_resume(struct snd_sof_dev *sdev)
{}

static inline int snd_sof_dsp_suspend(struct snd_sof_dev *sdev,
				      u32 target_state)
{}

static inline int snd_sof_dsp_runtime_resume(struct snd_sof_dev *sdev)
{}

static inline int snd_sof_dsp_runtime_suspend(struct snd_sof_dev *sdev)
{}

static inline int snd_sof_dsp_runtime_idle(struct snd_sof_dev *sdev)
{}

static inline int snd_sof_dsp_hw_params_upon_resume(struct snd_sof_dev *sdev)
{}

static inline int snd_sof_dsp_set_clk(struct snd_sof_dev *sdev, u32 freq)
{}

static inline int
snd_sof_dsp_set_power_state(struct snd_sof_dev *sdev,
			    const struct sof_dsp_power_state *target_state)
{}

/* debug */
void snd_sof_dsp_dbg_dump(struct snd_sof_dev *sdev, const char *msg, u32 flags);

static inline int snd_sof_debugfs_add_region_item(struct snd_sof_dev *sdev,
		enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size,
		const char *name, enum sof_debugfs_access_type access_type)
{}

/* register IO */
static inline void snd_sof_dsp_write8(struct snd_sof_dev *sdev, u32 bar,
				      u32 offset, u8 value)
{}

static inline void snd_sof_dsp_write(struct snd_sof_dev *sdev, u32 bar,
				     u32 offset, u32 value)
{}

static inline void snd_sof_dsp_write64(struct snd_sof_dev *sdev, u32 bar,
				       u32 offset, u64 value)
{}

static inline u8 snd_sof_dsp_read8(struct snd_sof_dev *sdev, u32 bar,
				   u32 offset)
{}

static inline u32 snd_sof_dsp_read(struct snd_sof_dev *sdev, u32 bar,
				   u32 offset)
{}

static inline u64 snd_sof_dsp_read64(struct snd_sof_dev *sdev, u32 bar,
				     u32 offset)
{}

static inline void snd_sof_dsp_update8(struct snd_sof_dev *sdev, u32 bar,
				       u32 offset, u8 mask, u8 value)
{}

/* block IO */
static inline int snd_sof_dsp_block_read(struct snd_sof_dev *sdev,
					 enum snd_sof_fw_blk_type blk_type,
					 u32 offset, void *dest, size_t bytes)
{}

static inline int snd_sof_dsp_block_write(struct snd_sof_dev *sdev,
					  enum snd_sof_fw_blk_type blk_type,
					  u32 offset, void *src, size_t bytes)
{}

/* mailbox IO */
static inline void snd_sof_dsp_mailbox_read(struct snd_sof_dev *sdev,
					    u32 offset, void *dest, size_t bytes)
{}

static inline void snd_sof_dsp_mailbox_write(struct snd_sof_dev *sdev,
					     u32 offset, void *src, size_t bytes)
{}

/* ipc */
static inline int snd_sof_dsp_send_msg(struct snd_sof_dev *sdev,
				       struct snd_sof_ipc_msg *msg)
{}

/* host PCM ops */
static inline int
snd_sof_pcm_platform_open(struct snd_sof_dev *sdev,
			  struct snd_pcm_substream *substream)
{}

/* disconnect pcm substream to a host stream */
static inline int
snd_sof_pcm_platform_close(struct snd_sof_dev *sdev,
			   struct snd_pcm_substream *substream)
{}

/* host stream hw params */
static inline int
snd_sof_pcm_platform_hw_params(struct snd_sof_dev *sdev,
			       struct snd_pcm_substream *substream,
			       struct snd_pcm_hw_params *params,
			       struct snd_sof_platform_stream_params *platform_params)
{}

/* host stream hw free */
static inline int
snd_sof_pcm_platform_hw_free(struct snd_sof_dev *sdev,
			     struct snd_pcm_substream *substream)
{}

/* host stream trigger */
static inline int
snd_sof_pcm_platform_trigger(struct snd_sof_dev *sdev,
			     struct snd_pcm_substream *substream, int cmd)
{}

/* Firmware loading */
static inline int snd_sof_load_firmware(struct snd_sof_dev *sdev)
{}

/* host DSP message data */
static inline int snd_sof_ipc_msg_data(struct snd_sof_dev *sdev,
				       struct snd_sof_pcm_stream *sps,
				       void *p, size_t sz)
{}
/* host side configuration of the stream's data offset in stream mailbox area */
static inline int
snd_sof_set_stream_data_offset(struct snd_sof_dev *sdev,
			       struct snd_sof_pcm_stream *sps,
			       size_t posn_offset)
{}

/* host stream pointer */
static inline snd_pcm_uframes_t
snd_sof_pcm_platform_pointer(struct snd_sof_dev *sdev,
			     struct snd_pcm_substream *substream)
{}

/* pcm ack */
static inline int snd_sof_pcm_platform_ack(struct snd_sof_dev *sdev,
					   struct snd_pcm_substream *substream)
{}

static inline u64
snd_sof_pcm_get_dai_frame_counter(struct snd_sof_dev *sdev,
				  struct snd_soc_component *component,
				  struct snd_pcm_substream *substream)
{}

static inline u64
snd_sof_pcm_get_host_byte_counter(struct snd_sof_dev *sdev,
				  struct snd_soc_component *component,
				  struct snd_pcm_substream *substream)
{}

/* machine driver */
static inline int
snd_sof_machine_register(struct snd_sof_dev *sdev, void *pdata)
{}

static inline void
snd_sof_machine_unregister(struct snd_sof_dev *sdev, void *pdata)
{}

static inline struct snd_soc_acpi_mach *
snd_sof_machine_select(struct snd_sof_dev *sdev)
{}

static inline void
snd_sof_set_mach_params(struct snd_soc_acpi_mach *mach,
			struct snd_sof_dev *sdev)
{}

static inline bool
snd_sof_is_chain_dma_supported(struct snd_sof_dev *sdev, u32 dai_type)
{}

/**
 * snd_sof_dsp_register_poll_timeout - Periodically poll an address
 * until a condition is met or a timeout occurs
 * @op: accessor function (takes @addr as its only argument)
 * @addr: Address to poll
 * @val: Variable to read the value into
 * @cond: Break condition (usually involving @val)
 * @sleep_us: Maximum time to sleep between reads in us (0
 *            tight-loops).  Should be less than ~20ms since usleep_range
 *            is used (see Documentation/timers/timers-howto.rst).
 * @timeout_us: Timeout in us, 0 means never timeout
 *
 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
 * case, the last read value at @addr is stored in @val. Must not
 * be called from atomic context if sleep_us or timeout_us are used.
 *
 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
 */
#define snd_sof_dsp_read_poll_timeout(sdev, bar, offset, val, cond, sleep_us, timeout_us)

/* This is for registers bits with attribute RWC */
bool snd_sof_pci_update_bits(struct snd_sof_dev *sdev, u32 offset,
			     u32 mask, u32 value);

bool snd_sof_dsp_update_bits_unlocked(struct snd_sof_dev *sdev, u32 bar,
				      u32 offset, u32 mask, u32 value);

bool snd_sof_dsp_update_bits64_unlocked(struct snd_sof_dev *sdev, u32 bar,
					u32 offset, u64 mask, u64 value);

bool snd_sof_dsp_update_bits(struct snd_sof_dev *sdev, u32 bar, u32 offset,
			     u32 mask, u32 value);

bool snd_sof_dsp_update_bits64(struct snd_sof_dev *sdev, u32 bar,
			       u32 offset, u64 mask, u64 value);

void snd_sof_dsp_update_bits_forced(struct snd_sof_dev *sdev, u32 bar,
				    u32 offset, u32 mask, u32 value);

int snd_sof_dsp_register_poll(struct snd_sof_dev *sdev, u32 bar, u32 offset,
			      u32 mask, u32 target, u32 timeout_ms,
			      u32 interval_us);

void snd_sof_dsp_panic(struct snd_sof_dev *sdev, u32 offset, bool non_recoverable);
#endif