linux/sound/soc/sof/imx/imx8ulp.c

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
//
// Copyright 2021-2022 NXP
//
// Author: Peng Zhang <[email protected]>
//
// Hardware interface for audio DSP on i.MX8ULP

#include <linux/arm-smccc.h>
#include <linux/clk.h>
#include <linux/firmware.h>
#include <linux/firmware/imx/dsp.h>
#include <linux/firmware/imx/ipc.h>
#include <linux/firmware/imx/svc/misc.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/of_reserved_mem.h>

#include <sound/sof.h>
#include <sound/sof/xtensa.h>

#include "../ops.h"
#include "../sof-of-dev.h"
#include "imx-common.h"

#define FSL_SIP_HIFI_XRDC

/* SIM Domain register */
#define SYSCTRL0
#define EXECUTE_BIT
#define RESET_BIT
#define HIFI4_CLK_BIT
#define PB_CLK_BIT
#define PLAT_CLK_BIT
#define DEBUG_LOGIC_BIT

#define MBOX_OFFSET
#define MBOX_SIZE

struct imx8ulp_priv {};

static void imx8ulp_sim_lpav_start(struct imx8ulp_priv *priv)
{}

static int imx8ulp_get_mailbox_offset(struct snd_sof_dev *sdev)
{}

static int imx8ulp_get_window_offset(struct snd_sof_dev *sdev, u32 id)
{}

static void imx8ulp_dsp_handle_reply(struct imx_dsp_ipc *ipc)
{}

static void imx8ulp_dsp_handle_request(struct imx_dsp_ipc *ipc)
{}

static struct imx_dsp_ops dsp_ops =;

static int imx8ulp_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)
{}

static int imx8ulp_run(struct snd_sof_dev *sdev)
{}

static int imx8ulp_reset(struct snd_sof_dev *sdev)
{}

static int imx8ulp_probe(struct snd_sof_dev *sdev)
{}

static void imx8ulp_remove(struct snd_sof_dev *sdev)
{}

/* on i.MX8 there is 1 to 1 match between type and BAR idx */
static int imx8ulp_get_bar_index(struct snd_sof_dev *sdev, u32 type)
{}

static int imx8ulp_suspend(struct snd_sof_dev *sdev)
{}

static int imx8ulp_resume(struct snd_sof_dev *sdev)
{}

static int imx8ulp_dsp_runtime_resume(struct snd_sof_dev *sdev)
{}

static int imx8ulp_dsp_runtime_suspend(struct snd_sof_dev *sdev)
{}

static int imx8ulp_dsp_suspend(struct snd_sof_dev *sdev, unsigned int target_state)
{}

static int imx8ulp_dsp_resume(struct snd_sof_dev *sdev)
{}

static struct snd_soc_dai_driver imx8ulp_dai[] =;

static int imx8ulp_dsp_set_power_state(struct snd_sof_dev *sdev,
				       const struct sof_dsp_power_state *target_state)
{}

/* i.MX8 ops */
static const struct snd_sof_dsp_ops sof_imx8ulp_ops =;

static struct snd_sof_of_mach sof_imx8ulp_machs[] =;

static struct sof_dev_desc sof_of_imx8ulp_desc =;

static const struct of_device_id sof_of_imx8ulp_ids[] =;
MODULE_DEVICE_TABLE(of, sof_of_imx8ulp_ids);

/* DT driver definition */
static struct platform_driver snd_sof_of_imx8ulp_driver =;
module_platform_driver();

MODULE_LICENSE();
MODULE_DESCRIPTION();
MODULE_IMPORT_NS();