linux/sound/soc/sof/ipc3.c

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
//
// This file is provided under a dual BSD/GPLv2 license.  When using or
// redistributing this file, you may do so under either license.
//
// Copyright(c) 2021 Intel Corporation
//
//

#include <sound/sof/stream.h>
#include <sound/sof/control.h>
#include <trace/events/sof.h>
#include "sof-priv.h"
#include "sof-audio.h"
#include "ipc3-priv.h"
#include "ops.h"

ipc3_rx_callback;

#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
static void ipc3_log_header(struct device *dev, u8 *text, u32 cmd)
{ … }
#else
static inline void ipc3_log_header(struct device *dev, u8 *text, u32 cmd)
{
	if ((cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_TRACE_MSG)
		dev_dbg(dev, "%s: 0x%x\n", text, cmd);
}
#endif

static void sof_ipc3_dump_payload(struct snd_sof_dev *sdev,
				  void *ipc_data, size_t size)
{ … }

static int sof_ipc3_get_reply(struct snd_sof_dev *sdev)
{ … }

/* wait for IPC message reply */
static int ipc3_wait_tx_done(struct snd_sof_ipc *ipc, void *reply_data)
{ … }

/* send IPC message from host to DSP */
static int ipc3_tx_msg_unlocked(struct snd_sof_ipc *ipc,
				void *msg_data, size_t msg_bytes,
				void *reply_data, size_t reply_bytes)
{ … }

static int sof_ipc3_tx_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
			   void *reply_data, size_t reply_bytes, bool no_pm)
{ … }

static int sof_ipc3_set_get_data(struct snd_sof_dev *sdev, void *data, size_t data_bytes,
				 bool set)
{ … }

int sof_ipc3_get_ext_windows(struct snd_sof_dev *sdev,
			     const struct sof_ipc_ext_data_hdr *ext_hdr)
{ … }

int sof_ipc3_get_cc_info(struct snd_sof_dev *sdev,
			 const struct sof_ipc_ext_data_hdr *ext_hdr)
{ … }

/* parse the extended FW boot data structures from FW boot message */
static int ipc3_fw_parse_ext_data(struct snd_sof_dev *sdev, u32 offset)
{ … }

static void ipc3_get_windows(struct snd_sof_dev *sdev)
{ … }

static int ipc3_init_reply_data_buffer(struct snd_sof_dev *sdev)
{ … }

int sof_ipc3_validate_fw_version(struct snd_sof_dev *sdev)
{ … }

static int ipc3_fw_ready(struct snd_sof_dev *sdev, u32 cmd)
{ … }

/* IPC stream position. */
static void ipc3_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id)
{ … }

/* DSP notifies host of an XRUN within FW */
static void ipc3_xrun(struct snd_sof_dev *sdev, u32 msg_id)
{ … }

/* stream notifications from firmware */
static void ipc3_stream_message(struct snd_sof_dev *sdev, void *msg_buf)
{ … }

/* component notifications from firmware */
static void ipc3_comp_notification(struct snd_sof_dev *sdev, void *msg_buf)
{ … }

static void ipc3_trace_message(struct snd_sof_dev *sdev, void *msg_buf)
{ … }

void sof_ipc3_do_rx_work(struct snd_sof_dev *sdev, struct sof_ipc_cmd_hdr *hdr, void *msg_buf)
{ … }
EXPORT_SYMBOL(…);

/* DSP firmware has sent host a message  */
static void sof_ipc3_rx_msg(struct snd_sof_dev *sdev)
{ … }

static int sof_ipc3_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on)
{ … }

static int sof_ipc3_ctx_ipc(struct snd_sof_dev *sdev, int cmd)
{ … }

static int sof_ipc3_ctx_save(struct snd_sof_dev *sdev)
{ … }

static int sof_ipc3_ctx_restore(struct snd_sof_dev *sdev)
{ … }

static int sof_ipc3_set_pm_gate(struct snd_sof_dev *sdev, u32 flags)
{ … }

static const struct sof_ipc_pm_ops ipc3_pm_ops = …;

const struct sof_ipc_ops ipc3_ops = …;