// SPDX-License-Identifier: GPL-2.0 // Copyright (C) 2019 Spreadtrum Communications Inc. #include <linux/errno.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/mutex.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/spinlock.h> #include "sprd-mcdt.h" /* MCDT registers definition */ #define MCDT_CH0_TXD … #define MCDT_CH0_RXD … #define MCDT_DAC0_WTMK … #define MCDT_ADC0_WTMK … #define MCDT_DMA_EN … #define MCDT_INT_EN0 … #define MCDT_INT_EN1 … #define MCDT_INT_EN2 … #define MCDT_INT_CLR0 … #define MCDT_INT_CLR1 … #define MCDT_INT_CLR2 … #define MCDT_INT_RAW1 … #define MCDT_INT_RAW2 … #define MCDT_INT_RAW3 … #define MCDT_INT_MSK1 … #define MCDT_INT_MSK2 … #define MCDT_INT_MSK3 … #define MCDT_DAC0_FIFO_ADDR_ST … #define MCDT_ADC0_FIFO_ADDR_ST … #define MCDT_CH_FIFO_ST0 … #define MCDT_CH_FIFO_ST1 … #define MCDT_CH_FIFO_ST2 … #define MCDT_INT_MSK_CFG0 … #define MCDT_INT_MSK_CFG1 … #define MCDT_DMA_CFG0 … #define MCDT_FIFO_CLR … #define MCDT_DMA_CFG1 … #define MCDT_DMA_CFG2 … #define MCDT_DMA_CFG3 … #define MCDT_DMA_CFG4 … #define MCDT_DMA_CFG5 … /* Channel water mark definition */ #define MCDT_CH_FIFO_AE_SHIFT … #define MCDT_CH_FIFO_AE_MASK … #define MCDT_CH_FIFO_AF_MASK … /* DMA channel select definition */ #define MCDT_DMA_CH0_SEL_MASK … #define MCDT_DMA_CH0_SEL_SHIFT … #define MCDT_DMA_CH1_SEL_MASK … #define MCDT_DMA_CH1_SEL_SHIFT … #define MCDT_DMA_CH2_SEL_MASK … #define MCDT_DMA_CH2_SEL_SHIFT … #define MCDT_DMA_CH3_SEL_MASK … #define MCDT_DMA_CH3_SEL_SHIFT … #define MCDT_DMA_CH4_SEL_MASK … #define MCDT_DMA_CH4_SEL_SHIFT … #define MCDT_DAC_DMA_SHIFT … /* DMA channel ACK select definition */ #define MCDT_DMA_ACK_SEL_MASK … /* Channel FIFO definition */ #define MCDT_CH_FIFO_ADDR_SHIFT … #define MCDT_CH_FIFO_ADDR_MASK … #define MCDT_ADC_FIFO_SHIFT … #define MCDT_FIFO_LENGTH … #define MCDT_ADC_CHANNEL_NUM … #define MCDT_DAC_CHANNEL_NUM … #define MCDT_CHANNEL_NUM … enum sprd_mcdt_fifo_int { … }; enum sprd_mcdt_fifo_sts { … }; struct sprd_mcdt_dev { … }; static LIST_HEAD(sprd_mcdt_chan_list); static DEFINE_MUTEX(sprd_mcdt_list_mutex); static void sprd_mcdt_update(struct sprd_mcdt_dev *mcdt, u32 reg, u32 val, u32 mask) { … } static void sprd_mcdt_dac_set_watermark(struct sprd_mcdt_dev *mcdt, u8 channel, u32 full, u32 empty) { … } static void sprd_mcdt_adc_set_watermark(struct sprd_mcdt_dev *mcdt, u8 channel, u32 full, u32 empty) { … } static void sprd_mcdt_dac_dma_enable(struct sprd_mcdt_dev *mcdt, u8 channel, bool enable) { … } static void sprd_mcdt_adc_dma_enable(struct sprd_mcdt_dev *mcdt, u8 channel, bool enable) { … } static void sprd_mcdt_ap_int_enable(struct sprd_mcdt_dev *mcdt, u8 channel, bool enable) { … } static void sprd_mcdt_dac_write_fifo(struct sprd_mcdt_dev *mcdt, u8 channel, u32 val) { … } static void sprd_mcdt_adc_read_fifo(struct sprd_mcdt_dev *mcdt, u8 channel, u32 *val) { … } static void sprd_mcdt_dac_dma_chn_select(struct sprd_mcdt_dev *mcdt, u8 channel, enum sprd_mcdt_dma_chan dma_chan) { … } static void sprd_mcdt_adc_dma_chn_select(struct sprd_mcdt_dev *mcdt, u8 channel, enum sprd_mcdt_dma_chan dma_chan) { … } static u32 sprd_mcdt_dma_ack_shift(u8 channel) { … } static void sprd_mcdt_dac_dma_ack_select(struct sprd_mcdt_dev *mcdt, u8 channel, enum sprd_mcdt_dma_chan dma_chan) { … } static void sprd_mcdt_adc_dma_ack_select(struct sprd_mcdt_dev *mcdt, u8 channel, enum sprd_mcdt_dma_chan dma_chan) { … } static bool sprd_mcdt_chan_fifo_sts(struct sprd_mcdt_dev *mcdt, u8 channel, enum sprd_mcdt_fifo_sts fifo_sts) { … } static void sprd_mcdt_dac_fifo_clear(struct sprd_mcdt_dev *mcdt, u8 channel) { … } static void sprd_mcdt_adc_fifo_clear(struct sprd_mcdt_dev *mcdt, u8 channel) { … } static u32 sprd_mcdt_dac_fifo_avail(struct sprd_mcdt_dev *mcdt, u8 channel) { … } static u32 sprd_mcdt_adc_fifo_avail(struct sprd_mcdt_dev *mcdt, u8 channel) { … } static u32 sprd_mcdt_int_type_shift(u8 channel, enum sprd_mcdt_fifo_int int_type) { … } static void sprd_mcdt_chan_int_en(struct sprd_mcdt_dev *mcdt, u8 channel, enum sprd_mcdt_fifo_int int_type, bool enable) { … } static void sprd_mcdt_chan_int_clear(struct sprd_mcdt_dev *mcdt, u8 channel, enum sprd_mcdt_fifo_int int_type) { … } static bool sprd_mcdt_chan_int_sts(struct sprd_mcdt_dev *mcdt, u8 channel, enum sprd_mcdt_fifo_int int_type) { … } static irqreturn_t sprd_mcdt_irq_handler(int irq, void *dev_id) { … } /** * sprd_mcdt_chan_write - write data to the MCDT channel's fifo * @chan: the MCDT channel * @tx_buf: send buffer * @size: data size * * Note: We can not write data to the channel fifo when enabling the DMA mode, * otherwise the channel fifo data will be invalid. * * If there are not enough space of the channel fifo, it will return errors * to users. * * Returns 0 on success, or an appropriate error code on failure. */ int sprd_mcdt_chan_write(struct sprd_mcdt_chan *chan, char *tx_buf, u32 size) { … } EXPORT_SYMBOL_GPL(…); /** * sprd_mcdt_chan_read - read data from the MCDT channel's fifo * @chan: the MCDT channel * @rx_buf: receive buffer * @size: data size * * Note: We can not read data from the channel fifo when enabling the DMA mode, * otherwise the reading data will be invalid. * * Usually user need start to read data once receiving the fifo full interrupt. * * Returns data size of reading successfully, or an error code on failure. */ int sprd_mcdt_chan_read(struct sprd_mcdt_chan *chan, char *rx_buf, u32 size) { … } EXPORT_SYMBOL_GPL(…); /** * sprd_mcdt_chan_int_enable - enable the interrupt mode for the MCDT channel * @chan: the MCDT channel * @water_mark: water mark to trigger a interrupt * @cb: callback when a interrupt happened * * Now it only can enable fifo almost full interrupt for ADC channel and fifo * almost empty interrupt for DAC channel. Morevoer for interrupt mode, user * should use sprd_mcdt_chan_read() or sprd_mcdt_chan_write() to read or write * data manually. * * For ADC channel, user can start to read data once receiving one fifo full * interrupt. For DAC channel, user can start to write data once receiving one * fifo empty interrupt or just call sprd_mcdt_chan_write() to write data * directly. * * Returns 0 on success, or an error code on failure. */ int sprd_mcdt_chan_int_enable(struct sprd_mcdt_chan *chan, u32 water_mark, struct sprd_mcdt_chan_callback *cb) { … } EXPORT_SYMBOL_GPL(…); /** * sprd_mcdt_chan_int_disable - disable the interrupt mode for the MCDT channel * @chan: the MCDT channel */ void sprd_mcdt_chan_int_disable(struct sprd_mcdt_chan *chan) { … } EXPORT_SYMBOL_GPL(…); /** * sprd_mcdt_chan_dma_enable - enable the DMA mode for the MCDT channel * @chan: the MCDT channel * @dma_chan: specify which DMA channel will be used for this MCDT channel * @water_mark: water mark to trigger a DMA request * * Enable the DMA mode for the MCDT channel, that means we can use DMA to * transfer data to the channel fifo and do not need reading/writing data * manually. * * Returns 0 on success, or an error code on failure. */ int sprd_mcdt_chan_dma_enable(struct sprd_mcdt_chan *chan, enum sprd_mcdt_dma_chan dma_chan, u32 water_mark) { … } EXPORT_SYMBOL_GPL(…); /** * sprd_mcdt_chan_dma_disable - disable the DMA mode for the MCDT channel * @chan: the MCDT channel */ void sprd_mcdt_chan_dma_disable(struct sprd_mcdt_chan *chan) { … } EXPORT_SYMBOL_GPL(…); /** * sprd_mcdt_request_chan - request one MCDT channel * @channel: channel id * @type: channel type, it can be one ADC channel or DAC channel * * Rreturn NULL if no available channel. */ struct sprd_mcdt_chan *sprd_mcdt_request_chan(u8 channel, enum sprd_mcdt_channel_type type) { … } EXPORT_SYMBOL_GPL(…); /** * sprd_mcdt_free_chan - free one MCDT channel * @chan: the channel to be freed */ void sprd_mcdt_free_chan(struct sprd_mcdt_chan *chan) { … } EXPORT_SYMBOL_GPL(…); static void sprd_mcdt_init_chans(struct sprd_mcdt_dev *mcdt, struct resource *res) { … } static int sprd_mcdt_probe(struct platform_device *pdev) { … } static void sprd_mcdt_remove(struct platform_device *pdev) { … } static const struct of_device_id sprd_mcdt_of_match[] = …; MODULE_DEVICE_TABLE(of, sprd_mcdt_of_match); static struct platform_driver sprd_mcdt_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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