// SPDX-License-Identifier: GPL-2.0-only /* * STM32 ALSA SoC Digital Audio Interface (I2S) driver. * * Copyright (C) 2017, STMicroelectronics - All Rights Reserved * Author(s): Olivier Moysan <[email protected]> for STMicroelectronics. */ #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/clk-provider.h> #include <linux/delay.h> #include <linux/module.h> #include <linux/of_irq.h> #include <linux/of_platform.h> #include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/reset.h> #include <linux/spinlock.h> #include <sound/dmaengine_pcm.h> #include <sound/pcm_params.h> #define STM32_I2S_CR1_REG … #define STM32_I2S_CFG1_REG … #define STM32_I2S_CFG2_REG … #define STM32_I2S_IER_REG … #define STM32_I2S_SR_REG … #define STM32_I2S_IFCR_REG … #define STM32_I2S_TXDR_REG … #define STM32_I2S_RXDR_REG … #define STM32_I2S_CGFR_REG … #define STM32_I2S_HWCFGR_REG … #define STM32_I2S_VERR_REG … #define STM32_I2S_IPIDR_REG … #define STM32_I2S_SIDR_REG … /* Bit definition for SPI2S_CR1 register */ #define I2S_CR1_SPE … #define I2S_CR1_CSTART … #define I2S_CR1_CSUSP … #define I2S_CR1_HDDIR … #define I2S_CR1_SSI … #define I2S_CR1_CRC33_17 … #define I2S_CR1_RCRCI … #define I2S_CR1_TCRCI … /* Bit definition for SPI_CFG2 register */ #define I2S_CFG2_IOSWP_SHIFT … #define I2S_CFG2_IOSWP … #define I2S_CFG2_LSBFRST … #define I2S_CFG2_AFCNTR … /* Bit definition for SPI_CFG1 register */ #define I2S_CFG1_FTHVL_SHIFT … #define I2S_CFG1_FTHVL_MASK … #define I2S_CFG1_FTHVL_SET(x) … #define I2S_CFG1_TXDMAEN … #define I2S_CFG1_RXDMAEN … /* Bit definition for SPI2S_IER register */ #define I2S_IER_RXPIE … #define I2S_IER_TXPIE … #define I2S_IER_DPXPIE … #define I2S_IER_EOTIE … #define I2S_IER_TXTFIE … #define I2S_IER_UDRIE … #define I2S_IER_OVRIE … #define I2S_IER_CRCEIE … #define I2S_IER_TIFREIE … #define I2S_IER_MODFIE … #define I2S_IER_TSERFIE … /* Bit definition for SPI2S_SR register */ #define I2S_SR_RXP … #define I2S_SR_TXP … #define I2S_SR_DPXP … #define I2S_SR_EOT … #define I2S_SR_TXTF … #define I2S_SR_UDR … #define I2S_SR_OVR … #define I2S_SR_CRCERR … #define I2S_SR_TIFRE … #define I2S_SR_MODF … #define I2S_SR_TSERF … #define I2S_SR_SUSP … #define I2S_SR_TXC … #define I2S_SR_RXPLVL … #define I2S_SR_RXWNE … #define I2S_SR_MASK … /* Bit definition for SPI_IFCR register */ #define I2S_IFCR_EOTC … #define I2S_IFCR_TXTFC … #define I2S_IFCR_UDRC … #define I2S_IFCR_OVRC … #define I2S_IFCR_CRCEC … #define I2S_IFCR_TIFREC … #define I2S_IFCR_MODFC … #define I2S_IFCR_TSERFC … #define I2S_IFCR_SUSPC … #define I2S_IFCR_MASK … /* Bit definition for SPI_I2SCGFR register */ #define I2S_CGFR_I2SMOD … #define I2S_CGFR_I2SCFG_SHIFT … #define I2S_CGFR_I2SCFG_MASK … #define I2S_CGFR_I2SCFG_SET(x) … #define I2S_CGFR_I2SSTD_SHIFT … #define I2S_CGFR_I2SSTD_MASK … #define I2S_CGFR_I2SSTD_SET(x) … #define I2S_CGFR_PCMSYNC … #define I2S_CGFR_DATLEN_SHIFT … #define I2S_CGFR_DATLEN_MASK … #define I2S_CGFR_DATLEN_SET(x) … #define I2S_CGFR_CHLEN_SHIFT … #define I2S_CGFR_CHLEN … #define I2S_CGFR_CKPOL … #define I2S_CGFR_FIXCH … #define I2S_CGFR_WSINV … #define I2S_CGFR_DATFMT … #define I2S_CGFR_I2SDIV_SHIFT … #define I2S_CGFR_I2SDIV_BIT_H … #define I2S_CGFR_I2SDIV_MASK … #define I2S_CGFR_I2SDIV_SET(x) … #define I2S_CGFR_I2SDIV_MAX … #define I2S_CGFR_ODD_SHIFT … #define I2S_CGFR_ODD … #define I2S_CGFR_MCKOE … /* Registers below apply to I2S version 1.1 and more */ /* Bit definition for SPI_HWCFGR register */ #define I2S_HWCFGR_I2S_SUPPORT_MASK … /* Bit definition for SPI_VERR register */ #define I2S_VERR_MIN_MASK … #define I2S_VERR_MAJ_MASK … /* Bit definition for SPI_IPIDR register */ #define I2S_IPIDR_ID_MASK … /* Bit definition for SPI_SIDR register */ #define I2S_SIDR_ID_MASK … #define I2S_IPIDR_NUMBER … enum i2s_master_mode { … }; enum i2s_mode { … }; enum i2s_fifo_th { … }; enum i2s_std { … }; enum i2s_datlen { … }; #define STM32_I2S_FIFO_SIZE … #define STM32_I2S_IS_MASTER(x) … #define STM32_I2S_IS_SLAVE(x) … #define STM32_I2S_NAME_LEN … #define STM32_I2S_RATE_11K … /** * struct stm32_i2s_data - private data of I2S * @regmap_conf: I2S register map configuration pointer * @regmap: I2S register map pointer * @pdev: device data pointer * @dai_drv: DAI driver pointer * @dma_data_tx: dma configuration data for tx channel * @dma_data_rx: dma configuration data for tx channel * @substream: PCM substream data pointer * @i2sclk: kernel clock feeding the I2S clock generator * @i2smclk: master clock from I2S mclk provider * @pclk: peripheral clock driving bus interface * @x8kclk: I2S parent clock for sampling frequencies multiple of 8kHz * @x11kclk: I2S parent clock for sampling frequencies multiple of 11kHz * @base: mmio register base virtual address * @phys_addr: I2S registers physical base address * @lock_fd: lock to manage race conditions in full duplex mode * @irq_lock: prevent race condition with IRQ * @mclk_rate: master clock frequency (Hz) * @fmt: DAI protocol * @divider: prescaler division ratio * @div: prescaler div field * @odd: prescaler odd field * @refcount: keep count of opened streams on I2S * @ms_flg: master mode flag. */ struct stm32_i2s_data { … }; struct stm32_i2smclk_data { … }; #define to_mclk_data(_hw) … static int stm32_i2s_calc_clk_div(struct stm32_i2s_data *i2s, unsigned long input_rate, unsigned long output_rate) { … } static int stm32_i2s_set_clk_div(struct stm32_i2s_data *i2s) { … } static int stm32_i2s_set_parent_clock(struct stm32_i2s_data *i2s, unsigned int rate) { … } static long stm32_i2smclk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) { … } static unsigned long stm32_i2smclk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static int stm32_i2smclk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { … } static int stm32_i2smclk_enable(struct clk_hw *hw) { … } static void stm32_i2smclk_disable(struct clk_hw *hw) { … } static const struct clk_ops mclk_ops = …; static int stm32_i2s_add_mclk_provider(struct stm32_i2s_data *i2s) { … } static irqreturn_t stm32_i2s_isr(int irq, void *devid) { … } static bool stm32_i2s_readable_reg(struct device *dev, unsigned int reg) { … } static bool stm32_i2s_volatile_reg(struct device *dev, unsigned int reg) { … } static bool stm32_i2s_writeable_reg(struct device *dev, unsigned int reg) { … } static int stm32_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) { … } static int stm32_i2s_set_sysclk(struct snd_soc_dai *cpu_dai, int clk_id, unsigned int freq, int dir) { … } static int stm32_i2s_configure_clock(struct snd_soc_dai *cpu_dai, struct snd_pcm_hw_params *params) { … } static int stm32_i2s_configure(struct snd_soc_dai *cpu_dai, struct snd_pcm_hw_params *params, struct snd_pcm_substream *substream) { … } static int stm32_i2s_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *cpu_dai) { … } static int stm32_i2s_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *cpu_dai) { … } static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *cpu_dai) { … } static void stm32_i2s_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *cpu_dai) { … } static int stm32_i2s_dai_probe(struct snd_soc_dai *cpu_dai) { … } static const struct regmap_config stm32_h7_i2s_regmap_conf = …; static const struct snd_soc_dai_ops stm32_i2s_pcm_dai_ops = …; static const struct snd_pcm_hardware stm32_i2s_pcm_hw = …; static const struct snd_dmaengine_pcm_config stm32_i2s_pcm_config = …; static const struct snd_soc_component_driver stm32_i2s_component = …; static void stm32_i2s_dai_init(struct snd_soc_pcm_stream *stream, char *stream_name) { … } static int stm32_i2s_dais_init(struct platform_device *pdev, struct stm32_i2s_data *i2s) { … } static const struct of_device_id stm32_i2s_ids[] = …; static int stm32_i2s_parse_dt(struct platform_device *pdev, struct stm32_i2s_data *i2s) { … } static void stm32_i2s_remove(struct platform_device *pdev) { … } static int stm32_i2s_probe(struct platform_device *pdev) { … } MODULE_DEVICE_TABLE(of, stm32_i2s_ids); #ifdef CONFIG_PM_SLEEP static int stm32_i2s_suspend(struct device *dev) { … } static int stm32_i2s_resume(struct device *dev) { … } #endif /* CONFIG_PM_SLEEP */ static const struct dev_pm_ops stm32_i2s_pm_ops = …; static struct platform_driver stm32_i2s_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_ALIAS(…) …; MODULE_LICENSE(…) …;
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