// SPDX-License-Identifier: GPL-2.0-only /* * tegra20_das.c - Tegra20 DAS driver * * Author: Stephen Warren <[email protected]> * Copyright (C) 2010 - NVIDIA, Inc. */ #include <linux/device.h> #include <linux/io.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/slab.h> #include <sound/soc.h> #define DRV_NAME … /* Register TEGRA20_DAS_DAP_CTRL_SEL */ #define TEGRA20_DAS_DAP_CTRL_SEL … #define TEGRA20_DAS_DAP_CTRL_SEL_COUNT … #define TEGRA20_DAS_DAP_CTRL_SEL_STRIDE … #define TEGRA20_DAS_DAP_CTRL_SEL_DAP_MS_SEL_P … #define TEGRA20_DAS_DAP_CTRL_SEL_DAP_MS_SEL_S … #define TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA1_TX_RX_P … #define TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA1_TX_RX_S … #define TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA2_TX_RX_P … #define TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA2_TX_RX_S … #define TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P … #define TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_S … /* Values for field TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL */ #define TEGRA20_DAS_DAP_SEL_DAC1 … #define TEGRA20_DAS_DAP_SEL_DAC2 … #define TEGRA20_DAS_DAP_SEL_DAC3 … #define TEGRA20_DAS_DAP_SEL_DAP1 … #define TEGRA20_DAS_DAP_SEL_DAP2 … #define TEGRA20_DAS_DAP_SEL_DAP3 … #define TEGRA20_DAS_DAP_SEL_DAP4 … #define TEGRA20_DAS_DAP_SEL_DAP5 … /* Register TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL */ #define TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL … #define TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_COUNT … #define TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_STRIDE … #define TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL_P … #define TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL_S … #define TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL_P … #define TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL_S … #define TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL_P … #define TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL_S … /* * Values for: * TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL * TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL * TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL */ #define TEGRA20_DAS_DAC_SEL_DAP1 … #define TEGRA20_DAS_DAC_SEL_DAP2 … #define TEGRA20_DAS_DAC_SEL_DAP3 … #define TEGRA20_DAS_DAC_SEL_DAP4 … #define TEGRA20_DAS_DAC_SEL_DAP5 … /* * Names/IDs of the DACs/DAPs. */ #define TEGRA20_DAS_DAP_ID_1 … #define TEGRA20_DAS_DAP_ID_2 … #define TEGRA20_DAS_DAP_ID_3 … #define TEGRA20_DAS_DAP_ID_4 … #define TEGRA20_DAS_DAP_ID_5 … #define TEGRA20_DAS_DAC_ID_1 … #define TEGRA20_DAS_DAC_ID_2 … #define TEGRA20_DAS_DAC_ID_3 … struct tegra20_das { … }; /* * Terminology: * DAS: Digital audio switch (HW module controlled by this driver) * DAP: Digital audio port (port/pins on Tegra device) * DAC: Digital audio controller (e.g. I2S or AC97 controller elsewhere) * * The Tegra DAS is a mux/cross-bar which can connect each DAP to a specific * DAC, or another DAP. When DAPs are connected, one must be the master and * one the slave. Each DAC allows selection of a specific DAP for input, to * cater for the case where N DAPs are connected to 1 DAC for broadcast * output. * * This driver is dumb; no attempt is made to ensure that a valid routing * configuration is programmed. */ static inline void tegra20_das_write(struct tegra20_das *das, u32 reg, u32 val) { … } static void tegra20_das_connect_dap_to_dac(struct tegra20_das *das, int dap, int dac) { … } static void tegra20_das_connect_dac_to_dap(struct tegra20_das *das, int dac, int dap) { … } #define LAST_REG(name) … static bool tegra20_das_wr_rd_reg(struct device *dev, unsigned int reg) { … } static const struct regmap_config tegra20_das_regmap_config = …; static int tegra20_das_probe(struct platform_device *pdev) { … } static const struct of_device_id tegra20_das_of_match[] = …; static struct platform_driver tegra20_das_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; MODULE_ALIAS(…) …; MODULE_DEVICE_TABLE(of, tegra20_das_of_match);
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