linux/sound/soc/tegra/tegra210_dmic.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * tegra210_dmic.h - Definitions for Tegra210 DMIC driver
 *
 * Copyright (c) 2020 NVIDIA CORPORATION.  All rights reserved.
 *
 */

#ifndef __TEGRA210_DMIC_H__
#define __TEGRA210_DMIC_H__

/* Register offsets from DMIC BASE */
#define TEGRA210_DMIC_TX_STATUS
#define TEGRA210_DMIC_TX_INT_STATUS
#define TEGRA210_DMIC_TX_INT_MASK
#define TEGRA210_DMIC_TX_INT_SET
#define TEGRA210_DMIC_TX_INT_CLEAR
#define TEGRA210_DMIC_TX_CIF_CTRL
#define TEGRA210_DMIC_ENABLE
#define TEGRA210_DMIC_SOFT_RESET
#define TEGRA210_DMIC_CG
#define TEGRA210_DMIC_STATUS
#define TEGRA210_DMIC_INT_STATUS
#define TEGRA210_DMIC_CTRL
#define TEGRA210_DMIC_DBG_CTRL
#define TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4
#define TEGRA210_DMIC_LP_FILTER_GAIN
#define TEGRA210_DMIC_LP_BIQUAD_0_COEF_0
#define TEGRA210_DMIC_LP_BIQUAD_0_COEF_1
#define TEGRA210_DMIC_LP_BIQUAD_0_COEF_2
#define TEGRA210_DMIC_LP_BIQUAD_0_COEF_3
#define TEGRA210_DMIC_LP_BIQUAD_0_COEF_4
#define TEGRA210_DMIC_LP_BIQUAD_1_COEF_0
#define TEGRA210_DMIC_LP_BIQUAD_1_COEF_1
#define TEGRA210_DMIC_LP_BIQUAD_1_COEF_2
#define TEGRA210_DMIC_LP_BIQUAD_1_COEF_3
#define TEGRA210_DMIC_LP_BIQUAD_1_COEF_4

/* Fields in TEGRA210_DMIC_CTRL */
#define CH_SEL_SHIFT
#define TEGRA210_DMIC_CTRL_CHANNEL_SELECT_MASK
#define LRSEL_POL_SHIFT
#define TEGRA210_DMIC_CTRL_LRSEL_POLARITY_MASK
#define OSR_SHIFT
#define TEGRA210_DMIC_CTRL_OSR_MASK

#define DMIC_OSR_FACTOR

#define DEFAULT_GAIN_Q23

/* Max boost gain factor used for mixer control */
#define MAX_BOOST_GAIN

enum tegra_dmic_ch_select {};

enum tegra_dmic_osr {};

enum tegra_dmic_lrsel {};

struct tegra210_dmic {};

#endif