linux/sound/soc/tegra/tegra210_adx.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * tegra210_adx.h - Definitions for Tegra210 ADX driver
 *
 * Copyright (c) 2021, NVIDIA CORPORATION.  All rights reserved.
 *
 */

#ifndef __TEGRA210_ADX_H__
#define __TEGRA210_ADX_H__

/* Register offsets from TEGRA210_ADX*_BASE */
#define TEGRA210_ADX_RX_STATUS
#define TEGRA210_ADX_RX_INT_STATUS
#define TEGRA210_ADX_RX_INT_MASK
#define TEGRA210_ADX_RX_INT_SET
#define TEGRA210_ADX_RX_INT_CLEAR
#define TEGRA210_ADX_RX_CIF_CTRL
#define TEGRA210_ADX_TX_STATUS
#define TEGRA210_ADX_TX_INT_STATUS
#define TEGRA210_ADX_TX_INT_MASK
#define TEGRA210_ADX_TX_INT_SET
#define TEGRA210_ADX_TX_INT_CLEAR
#define TEGRA210_ADX_TX1_CIF_CTRL
#define TEGRA210_ADX_TX2_CIF_CTRL
#define TEGRA210_ADX_TX3_CIF_CTRL
#define TEGRA210_ADX_TX4_CIF_CTRL
#define TEGRA210_ADX_ENABLE
#define TEGRA210_ADX_SOFT_RESET
#define TEGRA210_ADX_CG
#define TEGRA210_ADX_STATUS
#define TEGRA210_ADX_INT_STATUS
#define TEGRA210_ADX_CTRL
#define TEGRA210_ADX_IN_BYTE_EN0
#define TEGRA210_ADX_IN_BYTE_EN1
#define TEGRA210_ADX_CFG_RAM_CTRL
#define TEGRA210_ADX_CFG_RAM_DATA

/* Fields in TEGRA210_ADX_ENABLE */
#define TEGRA210_ADX_ENABLE_SHIFT

/* Fields in TEGRA210_ADX_CFG_RAM_CTRL */
#define TEGRA210_ADX_CFG_RAM_CTRL_RAM_ADDR_SHIFT

#define TEGRA210_ADX_CFG_RAM_CTRL_RW_SHIFT
#define TEGRA210_ADX_CFG_RAM_CTRL_RW_WRITE

#define TEGRA210_ADX_CFG_RAM_CTRL_ADDR_INIT_EN_SHIFT
#define TEGRA210_ADX_CFG_RAM_CTRL_ADDR_INIT_EN

#define TEGRA210_ADX_CFG_RAM_CTRL_SEQ_ACCESS_EN_SHIFT
#define TEGRA210_ADX_CFG_RAM_CTRL_SEQ_ACCESS_EN

/* Fields in TEGRA210_ADX_SOFT_RESET */
#define TEGRA210_ADX_SOFT_RESET_SOFT_RESET_SHIFT
#define TEGRA210_ADX_SOFT_RESET_SOFT_RESET_MASK
#define TEGRA210_ADX_SOFT_RESET_SOFT_EN
#define TEGRA210_ADX_SOFT_RESET_SOFT_DEFAULT

#define TEGRA210_ADX_AUDIOCIF_CH_STRIDE
#define TEGRA210_ADX_RAM_DEPTH
#define TEGRA210_ADX_MAP_STREAM_NUMBER_SHIFT
#define TEGRA210_ADX_MAP_WORD_NUMBER_SHIFT
#define TEGRA210_ADX_MAP_BYTE_NUMBER_SHIFT

struct tegra210_adx {};

#endif