linux/drivers/clk/sprd/pll.h

/* SPDX-License-Identifier: GPL-2.0 */
//
// Spreadtrum pll clock driver
//
// Copyright (C) 2015~2017 Spreadtrum, Inc.
// Author: Chunyan Zhang <[email protected]>

#ifndef _SPRD_PLL_H_
#define _SPRD_PLL_H_

#include "common.h"

struct reg_cfg {};

struct clk_bit_field {};

enum {};

/*
 * struct sprd_pll - definition of adjustable pll clock
 *
 * @reg:	registers used to set the configuration of pll clock,
 *		reg[0] shows how many registers this pll clock uses.
 * @itable:	pll ibias table, itable[0] means how many items this
 *		table includes
 * @udelay	delay time after setting rate
 * @factors	used to calculate the pll clock rate
 * @fvco:	fvco threshold rate
 * @fflag:	fvco flag
 */
struct sprd_pll {};

#define SPRD_PLL_HW_INIT_FN(_struct, _name, _parent, _reg,	\
			    _regs_num, _itable, _factors,	\
			    _udelay, _k1, _k2, _fflag,		\
			    _fvco, _fn)

#define SPRD_PLL_WITH_ITABLE_K_FVCO(_struct, _name, _parent, _reg,	\
				    _regs_num, _itable, _factors,	\
				    _udelay, _k1, _k2, _fflag, _fvco)

#define SPRD_PLL_WITH_ITABLE_K(_struct, _name, _parent, _reg,		\
			       _regs_num, _itable, _factors,		\
			       _udelay, _k1, _k2)

#define SPRD_PLL_WITH_ITABLE_1K(_struct, _name, _parent, _reg,		\
				_regs_num, _itable, _factors, _udelay)

#define SPRD_PLL_FW_NAME(_struct, _name, _parent, _reg, _regs_num,	\
			 _itable, _factors, _udelay, _k1, _k2,		\
			 _fflag, _fvco)

#define SPRD_PLL_HW(_struct, _name, _parent, _reg, _regs_num, _itable,	\
		    _factors, _udelay, _k1, _k2, _fflag, _fvco)

static inline struct sprd_pll *hw_to_sprd_pll(struct clk_hw *hw)
{}

extern const struct clk_ops sprd_pll_ops;

#endif /* _SPRD_PLL_H_ */