linux/include/dt-bindings/clock/sprd,sc9863a-clk.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Unisoc SC9863A platform clocks
 *
 * Copyright (C) 2019, Unisoc Communications Inc.
 */

#ifndef _DT_BINDINGS_CLK_SC9863A_H_
#define _DT_BINDINGS_CLK_SC9863A_H_

#define CLK_MPLL0_GATE
#define CLK_DPLL0_GATE
#define CLK_LPLL_GATE
#define CLK_GPLL_GATE
#define CLK_DPLL1_GATE
#define CLK_MPLL1_GATE
#define CLK_MPLL2_GATE
#define CLK_ISPPLL_GATE
#define CLK_PMU_APB_NUM

#define CLK_AUDIO_GATE
#define CLK_RPLL
#define CLK_RPLL_390M
#define CLK_RPLL_260M
#define CLK_RPLL_195M
#define CLK_RPLL_26M
#define CLK_ANLG_PHY_G5_NUM

#define CLK_TWPLL
#define CLK_TWPLL_768M
#define CLK_TWPLL_384M
#define CLK_TWPLL_192M
#define CLK_TWPLL_96M
#define CLK_TWPLL_48M
#define CLK_TWPLL_24M
#define CLK_TWPLL_12M
#define CLK_TWPLL_512M
#define CLK_TWPLL_256M
#define CLK_TWPLL_128M
#define CLK_TWPLL_64M
#define CLK_TWPLL_307M2
#define CLK_TWPLL_219M4
#define CLK_TWPLL_170M6
#define CLK_TWPLL_153M6
#define CLK_TWPLL_76M8
#define CLK_TWPLL_51M2
#define CLK_TWPLL_38M4
#define CLK_TWPLL_19M2
#define CLK_LPLL
#define CLK_LPLL_409M6
#define CLK_LPLL_245M76
#define CLK_GPLL
#define CLK_ISPPLL
#define CLK_ISPPLL_468M
#define CLK_ANLG_PHY_G1_NUM

#define CLK_DPLL0
#define CLK_DPLL1
#define CLK_DPLL0_933M
#define CLK_DPLL0_622M3
#define CLK_DPLL0_400M
#define CLK_DPLL0_266M7
#define CLK_DPLL0_123M1
#define CLK_DPLL0_50M
#define CLK_ANLG_PHY_G7_NUM

#define CLK_MPLL0
#define CLK_MPLL1
#define CLK_MPLL2
#define CLK_MPLL2_675M
#define CLK_ANLG_PHY_G4_NUM

#define CLK_AP_APB
#define CLK_AP_CE
#define CLK_NANDC_ECC
#define CLK_NANDC_26M
#define CLK_EMMC_32K
#define CLK_SDIO0_32K
#define CLK_SDIO1_32K
#define CLK_SDIO2_32K
#define CLK_OTG_UTMI
#define CLK_AP_UART0
#define CLK_AP_UART1
#define CLK_AP_UART2
#define CLK_AP_UART3
#define CLK_AP_UART4
#define CLK_AP_I2C0
#define CLK_AP_I2C1
#define CLK_AP_I2C2
#define CLK_AP_I2C3
#define CLK_AP_I2C4
#define CLK_AP_I2C5
#define CLK_AP_I2C6
#define CLK_AP_SPI0
#define CLK_AP_SPI1
#define CLK_AP_SPI2
#define CLK_AP_SPI3
#define CLK_AP_IIS0
#define CLK_AP_IIS1
#define CLK_AP_IIS2
#define CLK_SIM0
#define CLK_SIM0_32K
#define CLK_AP_CLK_NUM

#define CLK_13M
#define CLK_6M5
#define CLK_4M3
#define CLK_2M
#define CLK_250K
#define CLK_RCO_25M
#define CLK_RCO_4M
#define CLK_RCO_2M
#define CLK_EMC
#define CLK_AON_APB
#define CLK_ADI
#define CLK_AUX0
#define CLK_AUX1
#define CLK_AUX2
#define CLK_PROBE
#define CLK_PWM0
#define CLK_PWM1
#define CLK_PWM2
#define CLK_AON_THM
#define CLK_AUDIF
#define CLK_CPU_DAP
#define CLK_CPU_TS
#define CLK_DJTAG_TCK
#define CLK_EMC_REF
#define CLK_CSSYS
#define CLK_AON_PMU
#define CLK_PMU_26M
#define CLK_AON_TMR
#define CLK_POWER_CPU
#define CLK_AP_AXI
#define CLK_SDIO0_2X
#define CLK_SDIO1_2X
#define CLK_SDIO2_2X
#define CLK_EMMC_2X
#define CLK_DPU
#define CLK_DPU_DPI
#define CLK_OTG_REF
#define CLK_SDPHY_APB
#define CLK_ALG_IO_APB
#define CLK_GPU_CORE
#define CLK_GPU_SOC
#define CLK_MM_EMC
#define CLK_MM_AHB
#define CLK_BPC
#define CLK_DCAM_IF
#define CLK_ISP
#define CLK_JPG
#define CLK_CPP
#define CLK_SENSOR0
#define CLK_SENSOR1
#define CLK_SENSOR2
#define CLK_MM_VEMC
#define CLK_MM_VAHB
#define CLK_VSP
#define CLK_CORE0
#define CLK_CORE1
#define CLK_CORE2
#define CLK_CORE3
#define CLK_CORE4
#define CLK_CORE5
#define CLK_CORE6
#define CLK_CORE7
#define CLK_SCU
#define CLK_ACE
#define CLK_AXI_PERIPH
#define CLK_AXI_ACP
#define CLK_ATB
#define CLK_DEBUG_APB
#define CLK_GIC
#define CLK_PERIPH
#define CLK_AON_CLK_NUM

#define CLK_OTG_EB
#define CLK_DMA_EB
#define CLK_CE_EB
#define CLK_NANDC_EB
#define CLK_SDIO0_EB
#define CLK_SDIO1_EB
#define CLK_SDIO2_EB
#define CLK_EMMC_EB
#define CLK_EMMC_32K_EB
#define CLK_SDIO0_32K_EB
#define CLK_SDIO1_32K_EB
#define CLK_SDIO2_32K_EB
#define CLK_NANDC_26M_EB
#define CLK_DMA_EB2
#define CLK_CE_EB2
#define CLK_AP_AHB_GATE_NUM

#define CLK_GPIO_EB
#define CLK_PWM0_EB
#define CLK_PWM1_EB
#define CLK_PWM2_EB
#define CLK_PWM3_EB
#define CLK_KPD_EB
#define CLK_AON_SYST_EB
#define CLK_AP_SYST_EB
#define CLK_AON_TMR_EB
#define CLK_EFUSE_EB
#define CLK_EIC_EB
#define CLK_INTC_EB
#define CLK_ADI_EB
#define CLK_AUDIF_EB
#define CLK_AUD_EB
#define CLK_VBC_EB
#define CLK_PIN_EB
#define CLK_AP_WDG_EB
#define CLK_MM_EB
#define CLK_AON_APB_CKG_EB
#define CLK_CA53_TS0_EB
#define CLK_CA53_TS1_EB
#define CLK_CS53_DAP_EB
#define CLK_PMU_EB
#define CLK_THM_EB
#define CLK_AUX0_EB
#define CLK_AUX1_EB
#define CLK_AUX2_EB
#define CLK_PROBE_EB
#define CLK_EMC_REF_EB
#define CLK_CA53_WDG_EB
#define CLK_AP_TMR1_EB
#define CLK_AP_TMR2_EB
#define CLK_DISP_EMC_EB
#define CLK_ZIP_EMC_EB
#define CLK_GSP_EMC_EB
#define CLK_MM_VSP_EB
#define CLK_MDAR_EB
#define CLK_RTC4M0_CAL_EB
#define CLK_RTC4M1_CAL_EB
#define CLK_DJTAG_EB
#define CLK_MBOX_EB
#define CLK_AON_DMA_EB
#define CLK_AON_APB_DEF_EB
#define CLK_CA5_TS0_EB
#define CLK_DBG_EB
#define CLK_DBG_EMC_EB
#define CLK_CROSS_TRIG_EB
#define CLK_SERDES_DPHY_EB
#define CLK_ARCH_RTC_EB
#define CLK_KPD_RTC_EB
#define CLK_AON_SYST_RTC_EB
#define CLK_AP_SYST_RTC_EB
#define CLK_AON_TMR_RTC_EB
#define CLK_AP_TMR0_RTC_EB
#define CLK_EIC_RTC_EB
#define CLK_EIC_RTCDV5_EB
#define CLK_AP_WDG_RTC_EB
#define CLK_CA53_WDG_RTC_EB
#define CLK_THM_RTC_EB
#define CLK_ATHMA_RTC_EB
#define CLK_GTHMA_RTC_EB
#define CLK_ATHMA_RTC_A_EB
#define CLK_GTHMA_RTC_A_EB
#define CLK_AP_TMR1_RTC_EB
#define CLK_AP_TMR2_RTC_EB
#define CLK_DXCO_LC_RTC_EB
#define CLK_BB_CAL_RTC_EB
#define CLK_GNU_EB
#define CLK_DISP_EB
#define CLK_MM_EMC_EB
#define CLK_POWER_CPU_EB
#define CLK_HW_I2C_EB
#define CLK_MM_VSP_EMC_EB
#define CLK_VSP_EB
#define CLK_CSSYS_EB
#define CLK_DMC_EB
#define CLK_ROSC_EB
#define CLK_S_D_CFG_EB
#define CLK_S_D_REF_EB
#define CLK_B_DMA_EB
#define CLK_ANLG_EB
#define CLK_ANLG_APB_EB
#define CLK_BSMTMR_EB
#define CLK_AP_AXI_EB
#define CLK_AP_INTC0_EB
#define CLK_AP_INTC1_EB
#define CLK_AP_INTC2_EB
#define CLK_AP_INTC3_EB
#define CLK_AP_INTC4_EB
#define CLK_AP_INTC5_EB
#define CLK_SCC_EB
#define CLK_DPHY_CFG_EB
#define CLK_DPHY_REF_EB
#define CLK_CPHY_CFG_EB
#define CLK_OTG_REF_EB
#define CLK_SERDES_EB
#define CLK_AON_AP_EMC_EB
#define CLK_AON_APB_GATE_NUM

#define CLK_MAHB_CKG_EB
#define CLK_MDCAM_EB
#define CLK_MISP_EB
#define CLK_MAHBCSI_EB
#define CLK_MCSI_S_EB
#define CLK_MCSI_T_EB
#define CLK_DCAM_AXI_EB
#define CLK_ISP_AXI_EB
#define CLK_MCSI_EB
#define CLK_MCSI_S_CKG_EB
#define CLK_MCSI_T_CKG_EB
#define CLK_SENSOR0_EB
#define CLK_SENSOR1_EB
#define CLK_SENSOR2_EB
#define CLK_MCPHY_CFG_EB
#define CLK_MM_GATE_NUM

#define CLK_MIPI_CSI
#define CLK_MIPI_CSI_S
#define CLK_MIPI_CSI_M
#define CLK_MM_CLK_NUM

#define CLK_SIM0_EB
#define CLK_IIS0_EB
#define CLK_IIS1_EB
#define CLK_IIS2_EB
#define CLK_SPI0_EB
#define CLK_SPI1_EB
#define CLK_SPI2_EB
#define CLK_I2C0_EB
#define CLK_I2C1_EB
#define CLK_I2C2_EB
#define CLK_I2C3_EB
#define CLK_I2C4_EB
#define CLK_UART0_EB
#define CLK_UART1_EB
#define CLK_UART2_EB
#define CLK_UART3_EB
#define CLK_UART4_EB
#define CLK_SIM0_32K_EB
#define CLK_SPI3_EB
#define CLK_I2C5_EB
#define CLK_I2C6_EB
#define CLK_AP_APB_GATE_NUM

#endif /* _DT_BINDINGS_CLK_SC9863A_H_ */