linux/drivers/clk/sprd/pll.c

// SPDX-License-Identifier: GPL-2.0
//
// Spreadtrum pll clock driver
//
// Copyright (C) 2015~2017 Spreadtrum, Inc.
// Author: Chunyan Zhang <[email protected]>

#include <linux/delay.h>
#include <linux/err.h>
#include <linux/regmap.h>
#include <linux/slab.h>

#include "pll.h"

#define CLK_PLL_1M
#define CLK_PLL_10M

#define pindex(pll, member)

#define pshift(pll, member)

#define pwidth(pll, member)

#define pmask(pll, member)

#define pinternal(pll, cfg, member)

#define pinternal_val(pll, cfg, member)

static inline unsigned int
sprd_pll_read(const struct sprd_pll *pll, u8 index)
{}

static inline void
sprd_pll_write(const struct sprd_pll *pll, u8 index,
				  u32 msk, u32 val)
{}

static unsigned long pll_get_refin(const struct sprd_pll *pll)
{}

static u32 pll_get_ibias(u64 rate, const u64 *table)
{}

static unsigned long _sprd_pll_recalc_rate(const struct sprd_pll *pll,
					   unsigned long parent_rate)
{}

#define SPRD_PLL_WRITE_CHECK(pll, i, mask, val)

static int _sprd_pll_set_rate(const struct sprd_pll *pll,
			      unsigned long rate,
			      unsigned long parent_rate)
{}

static unsigned long sprd_pll_recalc_rate(struct clk_hw *hw,
					  unsigned long parent_rate)
{}

static int sprd_pll_set_rate(struct clk_hw *hw,
			     unsigned long rate,
			     unsigned long parent_rate)
{}

static int sprd_pll_clk_prepare(struct clk_hw *hw)
{}

static long sprd_pll_round_rate(struct clk_hw *hw, unsigned long rate,
				unsigned long *prate)
{}

const struct clk_ops sprd_pll_ops =;
EXPORT_SYMBOL_GPL();