#include <linux/auxiliary_bus.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <soc/starfive/reset-starfive-jh71x0.h>
#include <dt-bindings/clock/starfive,jh7110-crg.h>
#include "clk-starfive-jh7110.h"
#define JH7110_SYSCLK_OSC …
#define JH7110_SYSCLK_GMAC1_RMII_REFIN …
#define JH7110_SYSCLK_GMAC1_RGMII_RXIN …
#define JH7110_SYSCLK_I2STX_BCLK_EXT …
#define JH7110_SYSCLK_I2STX_LRCK_EXT …
#define JH7110_SYSCLK_I2SRX_BCLK_EXT …
#define JH7110_SYSCLK_I2SRX_LRCK_EXT …
#define JH7110_SYSCLK_TDM_EXT …
#define JH7110_SYSCLK_MCLK_EXT …
#define JH7110_SYSCLK_PLL0_OUT …
#define JH7110_SYSCLK_PLL1_OUT …
#define JH7110_SYSCLK_PLL2_OUT …
static const struct jh71x0_clk_data jh7110_sysclk_data[] __initconst = …;
static struct clk_hw *jh7110_sysclk_get(struct of_phandle_args *clkspec, void *data)
{ … }
static void jh7110_reset_unregister_adev(void *_adev)
{ … }
static void jh7110_reset_adev_release(struct device *dev)
{ … }
int jh7110_reset_controller_register(struct jh71x0_clk_priv *priv,
const char *adev_name,
u32 adev_id)
{ … }
EXPORT_SYMBOL_GPL(…);
static int __init jh7110_syscrg_probe(struct platform_device *pdev)
{ … }
static const struct of_device_id jh7110_syscrg_match[] = …;
static struct platform_driver jh7110_syscrg_driver = …;
builtin_platform_driver_probe(…);