/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2016 Maxime Ripard. All rights reserved. */ #ifndef _CCU_DIV_H_ #define _CCU_DIV_H_ #include <linux/clk-provider.h> #include "ccu_common.h" #include "ccu_mux.h" /** * struct ccu_div_internal - Internal divider description * @shift: Bit offset of the divider in its register * @width: Width of the divider field in its register * @max: Maximum value allowed for that divider. This is the * arithmetic value, not the maximum value to be set in the * register. * @flags: clk_divider flags to apply on this divider * @table: Divider table pointer (if applicable) * * That structure represents a single divider, and is meant to be * embedded in other structures representing the various clock * classes. * * It is basically a wrapper around the clk_divider functions * arguments. */ struct ccu_div_internal { … }; #define _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, _flags) … #define _SUNXI_CCU_DIV_TABLE(_shift, _width, _table) … #define _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, _off, _max, _flags) … #define _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, _max, _flags) … #define _SUNXI_CCU_DIV_FLAGS(_shift, _width, _flags) … #define _SUNXI_CCU_DIV_MAX(_shift, _width, _max) … #define _SUNXI_CCU_DIV_OFFSET(_shift, _width, _offset) … #define _SUNXI_CCU_DIV(_shift, _width) … struct ccu_div { … }; #define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \ _shift, _width, \ _table, _gate, _flags) … #define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg, \ _shift, _width, \ _table, _flags) … #define SUNXI_CCU_DIV_TABLE_HW(_struct, _name, _parent, _reg, \ _shift, _width, \ _table, _flags) … #define SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \ _parents, _table, \ _reg, \ _mshift, _mwidth, \ _muxshift, _muxwidth, \ _gate, _flags) … #define SUNXI_CCU_M_WITH_MUX_TABLE_GATE_CLOSEST(_struct, _name, \ _parents, _table, \ _reg, \ _mshift, _mwidth, \ _muxshift, _muxwidth, \ _gate, _flags) … #define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ _mshift, _mwidth, _muxshift, _muxwidth, \ _gate, _flags) … #define SUNXI_CCU_M_WITH_MUX_GATE_CLOSEST(_struct, _name, _parents, \ _reg, _mshift, _mwidth, \ _muxshift, _muxwidth, \ _gate, _flags) … #define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg, \ _mshift, _mwidth, _muxshift, _muxwidth, \ _flags) … #define SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg, \ _mshift, _mwidth, _gate, \ _flags) … #define SUNXI_CCU_M(_struct, _name, _parent, _reg, _mshift, _mwidth, \ _flags) … #define SUNXI_CCU_M_DATA_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ _mshift, _mwidth, \ _muxshift, _muxwidth, \ _gate, _flags) … #define SUNXI_CCU_M_DATA_WITH_MUX(_struct, _name, _parents, _reg, \ _mshift, _mwidth, \ _muxshift, _muxwidth, \ _flags) … #define SUNXI_CCU_M_HW_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ _mshift, _mwidth, _muxshift, _muxwidth, \ _gate, _flags) … #define SUNXI_CCU_M_HWS_WITH_GATE(_struct, _name, _parent, _reg, \ _mshift, _mwidth, _gate, \ _flags) … #define SUNXI_CCU_M_HWS(_struct, _name, _parent, _reg, _mshift, \ _mwidth, _flags) … static inline struct ccu_div *hw_to_ccu_div(struct clk_hw *hw) { … } extern const struct clk_ops ccu_div_ops; #endif /* _CCU_DIV_H_ */
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