linux/arch/x86/pci/mmconfig-shared.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Low-level direct PCI config space access via ECAM - common code between
 * i386 and x86-64.
 *
 * This code does:
 * - known chipset handling
 * - ACPI decoding and validation
 *
 * Per-architecture code takes care of the mappings and accesses
 * themselves.
 */

#define pr_fmt(fmt) …

#include <linux/acpi.h>
#include <linux/efi.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/bitmap.h>
#include <linux/dmi.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/rculist.h>
#include <asm/e820/api.h>
#include <asm/pci_x86.h>
#include <asm/acpi.h>

/* Indicate if the ECAM resources have been placed into the resource table */
static bool pci_mmcfg_running_state;
static bool pci_mmcfg_arch_init_failed;
static DEFINE_MUTEX(pci_mmcfg_lock);
#define pci_mmcfg_lock_held() …

LIST_HEAD(…);

static void __init pci_mmconfig_remove(struct pci_mmcfg_region *cfg)
{ … }

static void __init free_all_mmcfg(void)
{ … }

static void list_add_sorted(struct pci_mmcfg_region *new)
{ … }

static struct pci_mmcfg_region *pci_mmconfig_alloc(int segment, int start,
						   int end, u64 addr)
{ … }

struct pci_mmcfg_region *__init pci_mmconfig_add(int segment, int start,
						 int end, u64 addr)
{ … }

struct pci_mmcfg_region *pci_mmconfig_lookup(int segment, int bus)
{ … }

static const char *__init pci_mmcfg_e7520(void)
{ … }

static const char *__init pci_mmcfg_intel_945(void)
{ … }

static const char *__init pci_mmcfg_amd_fam10h(void)
{ … }

static bool __initdata mcp55_checked;
static const char *__init pci_mmcfg_nvidia_mcp55(void)
{ … }

struct pci_mmcfg_hostbridge_probe { … };

static const struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes[] __initconst = …;

static void __init pci_mmcfg_check_end_bus_number(void)
{ … }

static int __init pci_mmcfg_check_hostbridge(void)
{ … }

static acpi_status check_mcfg_resource(struct acpi_resource *res, void *data)
{ … }

static acpi_status find_mboard_resource(acpi_handle handle, u32 lvl,
					void *context, void **rv)
{ … }

static bool is_acpi_reserved(u64 start, u64 end, enum e820_type not_used)
{ … }

static bool is_efi_mmio(struct resource *res)
{ … }

check_reserved_t;

static bool __ref is_mmconf_reserved(check_reserved_t is_reserved,
				     struct pci_mmcfg_region *cfg,
				     struct device *dev, const char *method)
{ … }

static bool __ref pci_mmcfg_reserved(struct device *dev,
				     struct pci_mmcfg_region *cfg, int early)
{ … }

static void __init pci_mmcfg_reject_broken(int early)
{ … }

static bool __init acpi_mcfg_valid_entry(struct acpi_table_mcfg *mcfg,
					 struct acpi_mcfg_allocation *cfg)
{ … }

static int __init pci_parse_mcfg(struct acpi_table_header *header)
{ … }

#ifdef CONFIG_ACPI_APEI
extern int (*arch_apei_filter_addr)(int (*func)(__u64 start, __u64 size,
				     void *data), void *data);

static int pci_mmcfg_for_each_region(int (*func)(__u64 start, __u64 size,
				     void *data), void *data)
{ … }
#define set_apei_filter() …
#else
#define set_apei_filter …
#endif

static void __init __pci_mmcfg_init(int early)
{ … }

static int __initdata known_bridge;

void __init pci_mmcfg_early_init(void)
{ … }

void __init pci_mmcfg_late_init(void)
{ … }

static int __init pci_mmcfg_late_insert_resources(void)
{ … }

/*
 * Perform ECAM resource insertion after PCI initialization to allow for
 * misprogrammed MCFG tables that state larger sizes but actually conflict
 * with other system resources.
 */
late_initcall(pci_mmcfg_late_insert_resources);

/* Add ECAM information for host bridges */
int pci_mmconfig_insert(struct device *dev, u16 seg, u8 start, u8 end,
			phys_addr_t addr)
{ … }

/* Delete ECAM information for host bridges */
int pci_mmconfig_delete(u16 seg, u8 start, u8 end)
{ … }