/* * Copyright (C) 2017 Priit Laes <[email protected]> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This file is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #ifndef _DT_BINDINGS_CLK_SUN4I_A10_H_ #define _DT_BINDINGS_CLK_SUN4I_A10_H_ #define CLK_HOSC … #define CLK_PLL_VIDEO0_2X … #define CLK_PLL_VIDEO1_2X … #define CLK_CPU … /* AHB Gates */ #define CLK_AHB_OTG … #define CLK_AHB_EHCI0 … #define CLK_AHB_OHCI0 … #define CLK_AHB_EHCI1 … #define CLK_AHB_OHCI1 … #define CLK_AHB_SS … #define CLK_AHB_DMA … #define CLK_AHB_BIST … #define CLK_AHB_MMC0 … #define CLK_AHB_MMC1 … #define CLK_AHB_MMC2 … #define CLK_AHB_MMC3 … #define CLK_AHB_MS … #define CLK_AHB_NAND … #define CLK_AHB_SDRAM … #define CLK_AHB_ACE … #define CLK_AHB_EMAC … #define CLK_AHB_TS … #define CLK_AHB_SPI0 … #define CLK_AHB_SPI1 … #define CLK_AHB_SPI2 … #define CLK_AHB_SPI3 … #define CLK_AHB_PATA … #define CLK_AHB_SATA … #define CLK_AHB_GPS … #define CLK_AHB_HSTIMER … #define CLK_AHB_VE … #define CLK_AHB_TVD … #define CLK_AHB_TVE0 … #define CLK_AHB_TVE1 … #define CLK_AHB_LCD0 … #define CLK_AHB_LCD1 … #define CLK_AHB_CSI0 … #define CLK_AHB_CSI1 … #define CLK_AHB_HDMI0 … #define CLK_AHB_HDMI1 … #define CLK_AHB_DE_BE0 … #define CLK_AHB_DE_BE1 … #define CLK_AHB_DE_FE0 … #define CLK_AHB_DE_FE1 … #define CLK_AHB_GMAC … #define CLK_AHB_MP … #define CLK_AHB_GPU … /* APB0 Gates */ #define CLK_APB0_CODEC … #define CLK_APB0_SPDIF … #define CLK_APB0_I2S0 … #define CLK_APB0_AC97 … #define CLK_APB0_I2S1 … #define CLK_APB0_PIO … #define CLK_APB0_IR0 … #define CLK_APB0_IR1 … #define CLK_APB0_I2S2 … #define CLK_APB0_KEYPAD … /* APB1 Gates */ #define CLK_APB1_I2C0 … #define CLK_APB1_I2C1 … #define CLK_APB1_I2C2 … #define CLK_APB1_I2C3 … #define CLK_APB1_CAN … #define CLK_APB1_SCR … #define CLK_APB1_PS20 … #define CLK_APB1_PS21 … #define CLK_APB1_I2C4 … #define CLK_APB1_UART0 … #define CLK_APB1_UART1 … #define CLK_APB1_UART2 … #define CLK_APB1_UART3 … #define CLK_APB1_UART4 … #define CLK_APB1_UART5 … #define CLK_APB1_UART6 … #define CLK_APB1_UART7 … /* IP clocks */ #define CLK_NAND … #define CLK_MS … #define CLK_MMC0 … #define CLK_MMC0_OUTPUT … #define CLK_MMC0_SAMPLE … #define CLK_MMC1 … #define CLK_MMC1_OUTPUT … #define CLK_MMC1_SAMPLE … #define CLK_MMC2 … #define CLK_MMC2_OUTPUT … #define CLK_MMC2_SAMPLE … #define CLK_MMC3 … #define CLK_MMC3_OUTPUT … #define CLK_MMC3_SAMPLE … #define CLK_TS … #define CLK_SS … #define CLK_SPI0 … #define CLK_SPI1 … #define CLK_SPI2 … #define CLK_PATA … #define CLK_IR0 … #define CLK_IR1 … #define CLK_I2S0 … #define CLK_AC97 … #define CLK_SPDIF … #define CLK_KEYPAD … #define CLK_SATA … #define CLK_USB_OHCI0 … #define CLK_USB_OHCI1 … #define CLK_USB_PHY … #define CLK_GPS … #define CLK_SPI3 … #define CLK_I2S1 … #define CLK_I2S2 … /* DRAM Gates */ #define CLK_DRAM_VE … #define CLK_DRAM_CSI0 … #define CLK_DRAM_CSI1 … #define CLK_DRAM_TS … #define CLK_DRAM_TVD … #define CLK_DRAM_TVE0 … #define CLK_DRAM_TVE1 … #define CLK_DRAM_OUT … #define CLK_DRAM_DE_FE1 … #define CLK_DRAM_DE_FE0 … #define CLK_DRAM_DE_BE0 … #define CLK_DRAM_DE_BE1 … #define CLK_DRAM_MP … #define CLK_DRAM_ACE … /* Display Engine Clocks */ #define CLK_DE_BE0 … #define CLK_DE_BE1 … #define CLK_DE_FE0 … #define CLK_DE_FE1 … #define CLK_DE_MP … #define CLK_TCON0_CH0 … #define CLK_TCON1_CH0 … #define CLK_CSI_SCLK … #define CLK_TVD_SCLK2 … #define CLK_TVD … #define CLK_TCON0_CH1_SCLK2 … #define CLK_TCON0_CH1 … #define CLK_TCON1_CH1_SCLK2 … #define CLK_TCON1_CH1 … #define CLK_CSI0 … #define CLK_CSI1 … #define CLK_CODEC … #define CLK_VE … #define CLK_AVS … #define CLK_ACE … #define CLK_HDMI … #define CLK_GPU … #endif /* _DT_BINDINGS_CLK_SUN4I_A10_H_ */
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