// SPDX-License-Identifier: GPL-2.0-only #include <linux/clk.h> #include <linux/clkdev.h> #include <linux/clk-provider.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/io.h> #include <linux/math64.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/property.h> #include <linux/string.h> #define ADPLL_PLLSS_MMR_LOCK_OFFSET … #define ADPLL_PLLSS_MMR_LOCK_ENABLED … #define ADPLL_PLLSS_MMR_UNLOCK_MAGIC … #define ADPLL_PWRCTRL_OFFSET … #define ADPLL_PWRCTRL_PONIN … #define ADPLL_PWRCTRL_PGOODIN … #define ADPLL_PWRCTRL_RET … #define ADPLL_PWRCTRL_ISORET … #define ADPLL_PWRCTRL_ISOSCAN … #define ADPLL_PWRCTRL_OFFMODE … #define ADPLL_CLKCTRL_OFFSET … #define ADPLL_CLKCTRL_CLKDCOLDOEN … #define ADPLL_CLKCTRL_IDLE … #define ADPLL_CLKCTRL_CLKOUTEN … #define ADPLL_CLKINPHIFSEL_ADPLL_S … #define ADPLL_CLKCTRL_CLKOUTLDOEN_ADPLL_LJ … #define ADPLL_CLKCTRL_ULOWCLKEN … #define ADPLL_CLKCTRL_CLKDCOLDOPWDNZ … #define ADPLL_CLKCTRL_M2PWDNZ … #define ADPLL_CLKCTRL_M3PWDNZ_ADPLL_S … #define ADPLL_CLKCTRL_LOWCURRSTDBY_ADPLL_S … #define ADPLL_CLKCTRL_LPMODE_ADPLL_S … #define ADPLL_CLKCTRL_REGM4XEN_ADPLL_S … #define ADPLL_CLKCTRL_SELFREQDCO_ADPLL_LJ … #define ADPLL_CLKCTRL_TINITZ … #define ADPLL_TENABLE_OFFSET … #define ADPLL_TENABLEDIV_OFFSET … #define ADPLL_M2NDIV_OFFSET … #define ADPLL_M2NDIV_M2 … #define ADPLL_M2NDIV_M2_ADPLL_S_WIDTH … #define ADPLL_M2NDIV_M2_ADPLL_LJ_WIDTH … #define ADPLL_MN2DIV_OFFSET … #define ADPLL_MN2DIV_N2 … #define ADPLL_FRACDIV_OFFSET … #define ADPLL_FRACDIV_REGSD … #define ADPLL_FRACDIV_FRACTIONALM … #define ADPLL_FRACDIV_FRACTIONALM_MASK … #define ADPLL_BWCTRL_OFFSET … #define ADPLL_BWCTRL_BWCONTROL … #define ADPLL_BWCTRL_BW_INCR_DECRZ … #define ADPLL_RESERVED_OFFSET … #define ADPLL_STATUS_OFFSET … #define ADPLL_STATUS_PONOUT … #define ADPLL_STATUS_PGOODOUT … #define ADPLL_STATUS_LDOPWDN … #define ADPLL_STATUS_RECAL_BSTATUS3 … #define ADPLL_STATUS_RECAL_OPPIN … #define ADPLL_STATUS_PHASELOCK … #define ADPLL_STATUS_FREQLOCK … #define ADPLL_STATUS_BYPASSACK … #define ADPLL_STATUS_LOSSREF … #define ADPLL_STATUS_CLKOUTENACK … #define ADPLL_STATUS_LOCK2 … #define ADPLL_STATUS_M2CHANGEACK … #define ADPLL_STATUS_HIGHJITTER … #define ADPLL_STATUS_BYPASS … #define ADPLL_STATUS_PREPARED_MASK … #define ADPLL_M3DIV_OFFSET … #define ADPLL_M3DIV_M3 … #define ADPLL_M3DIV_M3_WIDTH … #define ADPLL_M3DIV_M3_MASK … #define ADPLL_RAMPCTRL_OFFSET … #define ADPLL_RAMPCTRL_CLKRAMPLEVEL … #define ADPLL_RAMPCTRL_CLKRAMPRATE … #define ADPLL_RAMPCTRL_RELOCK_RAMP_EN … #define MAX_ADPLL_INPUTS … #define MAX_ADPLL_OUTPUTS … #define ADPLL_MAX_RETRIES … #define to_dco(_hw) … #define to_adpll(_hw) … #define to_clkout(_hw) … enum ti_adpll_clocks { … }; #define TI_ADPLL_NR_CLOCKS … enum ti_adpll_inputs { … }; enum ti_adpll_s_outputs { … }; enum ti_adpll_lj_outputs { … }; struct ti_adpll_platform_data { … }; struct ti_adpll_clock { … }; struct ti_adpll_dco_data { … }; struct ti_adpll_clkout_data { … }; struct ti_adpll_data { … }; static const char *ti_adpll_clk_get_name(struct ti_adpll_data *d, int output_index, const char *postfix) { … } #define ADPLL_MAX_CON_ID … static int ti_adpll_setup_clock(struct ti_adpll_data *d, struct clk *clock, int index, int output_index, const char *name, void (*unregister)(struct clk *clk)) { … } static int ti_adpll_init_divider(struct ti_adpll_data *d, enum ti_adpll_clocks index, int output_index, char *name, struct clk *parent_clock, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags) { … } static int ti_adpll_init_mux(struct ti_adpll_data *d, enum ti_adpll_clocks index, char *name, struct clk *clk0, struct clk *clk1, void __iomem *reg, u8 shift) { … } static int ti_adpll_init_gate(struct ti_adpll_data *d, enum ti_adpll_clocks index, int output_index, char *name, struct clk *parent_clock, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags) { … } static int ti_adpll_init_fixed_factor(struct ti_adpll_data *d, enum ti_adpll_clocks index, char *name, struct clk *parent_clock, unsigned int mult, unsigned int div) { … } static void ti_adpll_set_idle_bypass(struct ti_adpll_data *d) { … } static void ti_adpll_clear_idle_bypass(struct ti_adpll_data *d) { … } static bool ti_adpll_clock_is_bypass(struct ti_adpll_data *d) { … } /* * Locked and bypass are not actually mutually exclusive: if you only care * about the DCO clock and not CLKOUT you can clear M2PWDNZ before enabling * the PLL, resulting in status (FREQLOCK | PHASELOCK | BYPASS) after lock. */ static bool ti_adpll_is_locked(struct ti_adpll_data *d) { … } static int ti_adpll_wait_lock(struct ti_adpll_data *d) { … } static int ti_adpll_prepare(struct clk_hw *hw) { … } static void ti_adpll_unprepare(struct clk_hw *hw) { … } static int ti_adpll_is_prepared(struct clk_hw *hw) { … } /* * Note that the DCO clock is never subject to bypass: if the PLL is off, * dcoclk is low. */ static unsigned long ti_adpll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } /* PLL parent is always clkinp, bypass only affects the children */ static u8 ti_adpll_get_parent(struct clk_hw *hw) { … } static const struct clk_ops ti_adpll_ops = …; static int ti_adpll_init_dco(struct ti_adpll_data *d) { … } static int ti_adpll_clkout_enable(struct clk_hw *hw) { … } static void ti_adpll_clkout_disable(struct clk_hw *hw) { … } static int ti_adpll_clkout_is_enabled(struct clk_hw *hw) { … } /* Setting PLL bypass puts clkout and clkoutx2 into bypass */ static u8 ti_adpll_clkout_get_parent(struct clk_hw *hw) { … } static int ti_adpll_init_clkout(struct ti_adpll_data *d, enum ti_adpll_clocks index, int output_index, int gate_bit, char *name, struct clk *clk0, struct clk *clk1) { … } static int ti_adpll_init_children_adpll_s(struct ti_adpll_data *d) { … } static int ti_adpll_init_children_adpll_lj(struct ti_adpll_data *d) { … } static void ti_adpll_free_resources(struct ti_adpll_data *d) { … } /* MPU PLL manages the lock register for all PLLs */ static void ti_adpll_unlock_all(void __iomem *reg) { … } static int ti_adpll_init_registers(struct ti_adpll_data *d) { … } static int ti_adpll_init_inputs(struct ti_adpll_data *d) { … } static const struct ti_adpll_platform_data ti_adpll_type_s = …; static const struct ti_adpll_platform_data ti_adpll_type_lj = …; static const struct of_device_id ti_adpll_match[] = …; MODULE_DEVICE_TABLE(of, ti_adpll_match); static int ti_adpll_probe(struct platform_device *pdev) { … } static void ti_adpll_remove(struct platform_device *pdev) { … } static struct platform_driver ti_adpll_driver = …; static int __init ti_adpll_init(void) { … } core_initcall(ti_adpll_init); static void __exit ti_adpll_exit(void) { … } module_exit(ti_adpll_exit); MODULE_DESCRIPTION(…) …; MODULE_ALIAS(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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