/* SPDX-License-Identifier: GPL-2.0+ */ /* * Device Tree binding constants for Bitmain BM1880 SoC * * Copyright (c) 2019 Linaro Ltd. */ #ifndef __DT_BINDINGS_CLOCK_BM1880_H #define __DT_BINDINGS_CLOCK_BM1880_H #define BM1880_CLK_OSC … #define BM1880_CLK_MPLL … #define BM1880_CLK_SPLL … #define BM1880_CLK_FPLL … #define BM1880_CLK_DDRPLL … #define BM1880_CLK_A53 … #define BM1880_CLK_50M_A53 … #define BM1880_CLK_AHB_ROM … #define BM1880_CLK_AXI_SRAM … #define BM1880_CLK_DDR_AXI … #define BM1880_CLK_EFUSE … #define BM1880_CLK_APB_EFUSE … #define BM1880_CLK_AXI5_EMMC … #define BM1880_CLK_EMMC … #define BM1880_CLK_100K_EMMC … #define BM1880_CLK_AXI5_SD … #define BM1880_CLK_SD … #define BM1880_CLK_100K_SD … #define BM1880_CLK_500M_ETH0 … #define BM1880_CLK_AXI4_ETH0 … #define BM1880_CLK_500M_ETH1 … #define BM1880_CLK_AXI4_ETH1 … #define BM1880_CLK_AXI1_GDMA … #define BM1880_CLK_APB_GPIO … #define BM1880_CLK_APB_GPIO_INTR … #define BM1880_CLK_GPIO_DB … #define BM1880_CLK_AXI1_MINER … #define BM1880_CLK_AHB_SF … #define BM1880_CLK_SDMA_AXI … #define BM1880_CLK_SDMA_AUD … #define BM1880_CLK_APB_I2C … #define BM1880_CLK_APB_WDT … #define BM1880_CLK_APB_JPEG … #define BM1880_CLK_JPEG_AXI … #define BM1880_CLK_AXI5_NF … #define BM1880_CLK_APB_NF … #define BM1880_CLK_NF … #define BM1880_CLK_APB_PWM … #define BM1880_CLK_DIV_0_RV … #define BM1880_CLK_DIV_1_RV … #define BM1880_CLK_MUX_RV … #define BM1880_CLK_RV … #define BM1880_CLK_APB_SPI … #define BM1880_CLK_TPU_AXI … #define BM1880_CLK_DIV_UART_500M … #define BM1880_CLK_UART_500M … #define BM1880_CLK_APB_UART … #define BM1880_CLK_APB_I2S … #define BM1880_CLK_AXI4_USB … #define BM1880_CLK_APB_USB … #define BM1880_CLK_125M_USB … #define BM1880_CLK_33K_USB … #define BM1880_CLK_DIV_12M_USB … #define BM1880_CLK_12M_USB … #define BM1880_CLK_APB_VIDEO … #define BM1880_CLK_VIDEO_AXI … #define BM1880_CLK_VPP_AXI … #define BM1880_CLK_APB_VPP … #define BM1880_CLK_DIV_0_AXI1 … #define BM1880_CLK_DIV_1_AXI1 … #define BM1880_CLK_AXI1 … #define BM1880_CLK_AXI2 … #define BM1880_CLK_AXI3 … #define BM1880_CLK_AXI4 … #define BM1880_CLK_AXI5 … #define BM1880_CLK_DIV_0_AXI6 … #define BM1880_CLK_DIV_1_AXI6 … #define BM1880_CLK_MUX_AXI6 … #define BM1880_CLK_AXI6 … #define BM1880_NR_CLKS … #endif /* __DT_BINDINGS_CLOCK_BM1880_H */
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