clk-en7523.c | Explore in Territory

// SPDX-License-Identifier: GPL-2.0-only

#include <linux/delay.h>
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/reset-controller.h>
#include <dt-bindings/clock/en7523-clk.h>
#include <dt-bindings/reset/airoha,en7581-reset.h>

#define RST_NR_PER_BANK …

#define REG_PCI_CONTROL …
#define REG_PCI_CONTROL_PERSTOUT …
#define REG_PCI_CONTROL_PERSTOUT1 …
#define REG_PCI_CONTROL_REFCLK_EN0 …
#define REG_PCI_CONTROL_REFCLK_EN1 …
#define REG_PCI_CONTROL_PERSTOUT2 …
#define REG_GSW_CLK_DIV_SEL …
#define REG_EMI_CLK_DIV_SEL …
#define REG_BUS_CLK_DIV_SEL …
#define REG_SPI_CLK_DIV_SEL …
#define REG_SPI_CLK_FREQ_SEL …
#define REG_NPU_CLK_DIV_SEL …
#define REG_CRYPTO_CLKSRC …
#define REG_RESET_CONTROL2 …
#define REG_RESET2_CONTROL_PCIE2 …
#define REG_RESET_CONTROL1 …
#define REG_RESET_CONTROL_PCIEHB …
#define REG_RESET_CONTROL_PCIE1 …
#define REG_RESET_CONTROL_PCIE2 …
/* EN7581 */
#define REG_PCIE0_MEM …
#define REG_PCIE0_MEM_MASK …
#define REG_PCIE1_MEM …
#define REG_PCIE1_MEM_MASK …
#define REG_PCIE2_MEM …
#define REG_PCIE2_MEM_MASK …
#define REG_NP_SCU_PCIC …
#define REG_NP_SCU_SSTR …
#define REG_PCIE_XSI0_SEL_MASK …
#define REG_PCIE_XSI1_SEL_MASK …

#define REG_RST_CTRL2 …
#define REG_RST_CTRL1 …

struct en_clk_desc { … };

struct en_clk_gate { … };

struct en_rst_data { … };

struct en_clk_soc_data { … };

static const u32 gsw_base[] = …;
static const u32 emi_base[] = …;
static const u32 bus_base[] = …;
static const u32 slic_base[] = …;
static const u32 npu_base[] = …;

static const struct en_clk_desc en7523_base_clks[] = …;

static const u16 en7581_rst_ofs[] = …;

static const u16 en7581_rst_map[] = …;

static unsigned int en7523_get_base_rate(void __iomem *base, unsigned int i)
{ … }

static u32 en7523_get_div(void __iomem *base, int i)
{ … }

static int en7523_pci_is_enabled(struct clk_hw *hw)
{ … }

static int en7523_pci_prepare(struct clk_hw *hw)
{ … }

static void en7523_pci_unprepare(struct clk_hw *hw)
{ … }

static struct clk_hw *en7523_register_pcie_clk(struct device *dev,
					       void __iomem *np_base)
{ … }

static int en7581_pci_is_enabled(struct clk_hw *hw)
{ … }

static int en7581_pci_enable(struct clk_hw *hw)
{ … }

static void en7581_pci_disable(struct clk_hw *hw)
{ … }

static int en7581_clk_hw_init(struct platform_device *pdev,
			      void __iomem *np_base)
{ … }

static void en7523_register_clocks(struct device *dev, struct clk_hw_onecell_data *clk_data,
				   void __iomem *base, void __iomem *np_base)
{ … }

static int en7523_reset_update(struct reset_controller_dev *rcdev,
			       unsigned long id, bool assert)
{ … }

static int en7523_reset_assert(struct reset_controller_dev *rcdev,
			       unsigned long id)
{ … }

static int en7523_reset_deassert(struct reset_controller_dev *rcdev,
				 unsigned long id)
{ … }

static int en7523_reset_status(struct reset_controller_dev *rcdev,
			       unsigned long id)
{ … }

static int en7523_reset_xlate(struct reset_controller_dev *rcdev,
			      const struct of_phandle_args *reset_spec)
{ … }

static const struct reset_control_ops en7523_reset_ops = …;

static int en7523_reset_register(struct platform_device *pdev,
				 const struct en_clk_soc_data *soc_data)
{ … }

static int en7523_clk_probe(struct platform_device *pdev)
{ … }

static const struct en_clk_soc_data en7523_data = …;

static const struct en_clk_soc_data en7581_data = …;

static const struct of_device_id of_match_clk_en7523[] = …;

static struct platform_driver clk_en7523_drv = …;

static int __init clk_en7523_init(void)
{ … }

arch_initcall(clk_en7523_init);
linux/drivers/clk/clk-en7523.c
