/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ #ifndef DT_BINDINGS_ASPEED_CLOCK_H #define DT_BINDINGS_ASPEED_CLOCK_H #define ASPEED_CLK_GATE_ECLK … #define ASPEED_CLK_GATE_GCLK … #define ASPEED_CLK_GATE_MCLK … #define ASPEED_CLK_GATE_VCLK … #define ASPEED_CLK_GATE_BCLK … #define ASPEED_CLK_GATE_DCLK … #define ASPEED_CLK_GATE_REFCLK … #define ASPEED_CLK_GATE_USBPORT2CLK … #define ASPEED_CLK_GATE_LCLK … #define ASPEED_CLK_GATE_USBUHCICLK … #define ASPEED_CLK_GATE_D1CLK … #define ASPEED_CLK_GATE_YCLK … #define ASPEED_CLK_GATE_USBPORT1CLK … #define ASPEED_CLK_GATE_UART1CLK … #define ASPEED_CLK_GATE_UART2CLK … #define ASPEED_CLK_GATE_UART5CLK … #define ASPEED_CLK_GATE_ESPICLK … #define ASPEED_CLK_GATE_MAC1CLK … #define ASPEED_CLK_GATE_MAC2CLK … #define ASPEED_CLK_GATE_RSACLK … #define ASPEED_CLK_GATE_UART3CLK … #define ASPEED_CLK_GATE_UART4CLK … #define ASPEED_CLK_GATE_SDCLK … #define ASPEED_CLK_GATE_LHCCLK … #define ASPEED_CLK_HPLL … #define ASPEED_CLK_AHB … #define ASPEED_CLK_APB … #define ASPEED_CLK_UART … #define ASPEED_CLK_SDIO … #define ASPEED_CLK_ECLK … #define ASPEED_CLK_ECLK_MUX … #define ASPEED_CLK_LHCLK … #define ASPEED_CLK_MAC … #define ASPEED_CLK_BCLK … #define ASPEED_CLK_MPLL … #define ASPEED_CLK_24M … #define ASPEED_CLK_MAC1RCLK … #define ASPEED_CLK_MAC2RCLK … #define ASPEED_RESET_XDMA … #define ASPEED_RESET_MCTP … #define ASPEED_RESET_ADC … #define ASPEED_RESET_JTAG_MASTER … #define ASPEED_RESET_MIC … #define ASPEED_RESET_PWM … #define ASPEED_RESET_PECI … #define ASPEED_RESET_I2C … #define ASPEED_RESET_AHB … #define ASPEED_RESET_CRT1 … #define ASPEED_RESET_HACE … #endif
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