// SPDX-License-Identifier: GPL-2.0 /* * Driver for Silicon Labs Si544 Programmable Oscillator * Copyright (C) 2018 Topic Embedded Products * Author: Mike Looijmans <[email protected]> */ #include <linux/clk-provider.h> #include <linux/delay.h> #include <linux/math64.h> #include <linux/module.h> #include <linux/i2c.h> #include <linux/regmap.h> #include <linux/slab.h> /* I2C registers (decimal as in datasheet) */ #define SI544_REG_CONTROL … #define SI544_REG_OE_STATE … #define SI544_REG_HS_DIV … #define SI544_REG_LS_HS_DIV … #define SI544_REG_FBDIV0 … #define SI544_REG_FBDIV8 … #define SI544_REG_FBDIV16 … #define SI544_REG_FBDIV24 … #define SI544_REG_FBDIV32 … #define SI544_REG_FBDIV40 … #define SI544_REG_FCAL_OVR … #define SI544_REG_ADPLL_DELTA_M0 … #define SI544_REG_ADPLL_DELTA_M8 … #define SI544_REG_ADPLL_DELTA_M16 … #define SI544_REG_PAGE_SELECT … /* Register values */ #define SI544_CONTROL_RESET … #define SI544_CONTROL_MS_ICAL2 … #define SI544_OE_STATE_ODC_OE … /* Max freq depends on speed grade */ #define SI544_MIN_FREQ … /* Si544 Internal oscilator runs at 55.05 MHz */ #define FXO … /* VCO range is 10.8 .. 12.1 GHz, max depends on speed grade */ #define FVCO_MIN … #define HS_DIV_MAX … #define HS_DIV_MAX_ODD … /* Lowest frequency synthesizeable using only the HS divider */ #define MIN_HSDIV_FREQ … /* Range and interpretation of the adjustment value */ #define DELTA_M_MAX … #define DELTA_M_FRAC_NUM … #define DELTA_M_FRAC_DEN … struct clk_si544 { … }; #define to_clk_si544(_hw) … /** * struct clk_si544_muldiv - Multiplier/divider settings * @fb_div_frac: integer part of feedback divider (32 bits) * @fb_div_int: fractional part of feedback divider (11 bits) * @hs_div: 1st divider, 5..2046, must be even when >33 * @ls_div_bits: 2nd divider, as 2^x, range 0..5 * If ls_div_bits is non-zero, hs_div must be even * @delta_m: Frequency shift for small -950..+950 ppm changes, 24 bit */ struct clk_si544_muldiv { … }; /* Enables or disables the output driver */ static int si544_enable_output(struct clk_si544 *data, bool enable) { … } static int si544_prepare(struct clk_hw *hw) { … } static void si544_unprepare(struct clk_hw *hw) { … } static int si544_is_prepared(struct clk_hw *hw) { … } /* Retrieve clock multiplier and dividers from hardware */ static int si544_get_muldiv(struct clk_si544 *data, struct clk_si544_muldiv *settings) { … } static int si544_set_delta_m(struct clk_si544 *data, s32 delta_m) { … } static int si544_set_muldiv(struct clk_si544 *data, struct clk_si544_muldiv *settings) { … } static bool is_valid_frequency(const struct clk_si544 *data, unsigned long frequency) { … } /* Calculate divider settings for a given frequency */ static int si544_calc_muldiv(struct clk_si544_muldiv *settings, unsigned long frequency) { … } /* Calculate resulting frequency given the register settings */ static unsigned long si544_calc_center_rate( const struct clk_si544_muldiv *settings) { … } static unsigned long si544_calc_rate(const struct clk_si544_muldiv *settings) { … } static unsigned long si544_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static long si544_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { … } /* Calculates the maximum "small" change, 950 * rate / 1000000 */ static unsigned long si544_max_delta(unsigned long rate) { … } static s32 si544_calc_delta(s32 delta, s32 max_delta) { … } static int si544_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { … } static const struct clk_ops si544_clk_ops = …; static bool si544_regmap_is_volatile(struct device *dev, unsigned int reg) { … } static const struct regmap_config si544_regmap_config = …; static int si544_probe(struct i2c_client *client) { … } static const struct i2c_device_id si544_id[] = …; MODULE_DEVICE_TABLE(i2c, si544_id); static const struct of_device_id clk_si544_of_match[] = …; MODULE_DEVICE_TABLE(of, clk_si544_of_match); static struct i2c_driver si544_driver = …; module_i2c_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
Codebase Browser
linux