// SPDX-License-Identifier: GPL-2.0-only /* * Driver for Audio DMA Controller (ADMAC) on t8103 (M1) and other Apple chips * * Copyright (C) The Asahi Linux Contributors */ #include <linux/bits.h> #include <linux/bitfield.h> #include <linux/device.h> #include <linux/init.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_dma.h> #include <linux/platform_device.h> #include <linux/reset.h> #include <linux/spinlock.h> #include <linux/interrupt.h> #include "dmaengine.h" #define NCHANNELS_MAX … #define IRQ_NOUTPUTS … /* * For allocation purposes we split the cache * memory into blocks of fixed size (given in bytes). */ #define SRAM_BLOCK … #define RING_WRITE_SLOT … #define RING_READ_SLOT … #define RING_FULL … #define RING_EMPTY … #define RING_ERR … #define STATUS_DESC_DONE … #define STATUS_ERR … #define FLAG_DESC_NOTIFY … #define REG_TX_START … #define REG_TX_STOP … #define REG_RX_START … #define REG_RX_STOP … #define REG_IMPRINT … #define REG_TX_SRAM_SIZE … #define REG_RX_SRAM_SIZE … #define REG_CHAN_CTL(ch) … #define REG_CHAN_CTL_RST_RINGS … #define REG_DESC_RING(ch) … #define REG_REPORT_RING(ch) … #define REG_RESIDUE(ch) … #define REG_BUS_WIDTH(ch) … #define BUS_WIDTH_WORD_SIZE … #define BUS_WIDTH_FRAME_SIZE … #define BUS_WIDTH_8BIT … #define BUS_WIDTH_16BIT … #define BUS_WIDTH_32BIT … #define BUS_WIDTH_FRAME_2_WORDS … #define BUS_WIDTH_FRAME_4_WORDS … #define REG_CHAN_SRAM_CARVEOUT(ch) … #define CHAN_SRAM_CARVEOUT_SIZE … #define CHAN_SRAM_CARVEOUT_BASE … #define REG_CHAN_FIFOCTL(ch) … #define CHAN_FIFOCTL_LIMIT … #define CHAN_FIFOCTL_THRESHOLD … #define REG_DESC_WRITE(ch) … #define REG_REPORT_READ(ch) … #define REG_TX_INTSTATE(idx) … #define REG_RX_INTSTATE(idx) … #define REG_GLOBAL_INTSTATE(idx) … #define REG_CHAN_INTSTATUS(ch, idx) … #define REG_CHAN_INTMASK(ch, idx) … struct admac_data; struct admac_tx; struct admac_chan { … }; struct admac_sram { … }; struct admac_data { … }; struct admac_tx { … }; static int admac_alloc_sram_carveout(struct admac_data *ad, enum dma_transfer_direction dir, u32 *out) { … } static void admac_free_sram_carveout(struct admac_data *ad, enum dma_transfer_direction dir, u32 carveout) { … } static void admac_modify(struct admac_data *ad, int reg, u32 mask, u32 val) { … } static struct admac_chan *to_admac_chan(struct dma_chan *chan) { … } static struct admac_tx *to_admac_tx(struct dma_async_tx_descriptor *tx) { … } static enum dma_transfer_direction admac_chan_direction(int channo) { … } static dma_cookie_t admac_tx_submit(struct dma_async_tx_descriptor *tx) { … } static int admac_desc_free(struct dma_async_tx_descriptor *tx) { … } static struct dma_async_tx_descriptor *admac_prep_dma_cyclic( struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags) { … } /* * Write one hardware descriptor for a dmaengine cyclic transaction. */ static void admac_cyclic_write_one_desc(struct admac_data *ad, int channo, struct admac_tx *tx) { … } /* * Write all the hardware descriptors for a dmaengine cyclic * transaction there is space for. */ static void admac_cyclic_write_desc(struct admac_data *ad, int channo, struct admac_tx *tx) { … } static int admac_ring_noccupied_slots(int ringval) { … } /* * Read from hardware the residue of a cyclic dmaengine transaction. */ static u32 admac_cyclic_read_residue(struct admac_data *ad, int channo, struct admac_tx *adtx) { … } static enum dma_status admac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) { … } static void admac_start_chan(struct admac_chan *adchan) { … } static void admac_stop_chan(struct admac_chan *adchan) { … } static void admac_reset_rings(struct admac_chan *adchan) { … } static void admac_start_current_tx(struct admac_chan *adchan) { … } static void admac_issue_pending(struct dma_chan *chan) { … } static int admac_pause(struct dma_chan *chan) { … } static int admac_resume(struct dma_chan *chan) { … } static int admac_terminate_all(struct dma_chan *chan) { … } static void admac_synchronize(struct dma_chan *chan) { … } static int admac_alloc_chan_resources(struct dma_chan *chan) { … } static void admac_free_chan_resources(struct dma_chan *chan) { … } static struct dma_chan *admac_dma_of_xlate(struct of_phandle_args *dma_spec, struct of_dma *ofdma) { … } static int admac_drain_reports(struct admac_data *ad, int channo) { … } static void admac_handle_status_err(struct admac_data *ad, int channo) { … } static void admac_handle_status_desc_done(struct admac_data *ad, int channo) { … } static void admac_handle_chan_int(struct admac_data *ad, int no) { … } static irqreturn_t admac_interrupt(int irq, void *devid) { … } static void admac_chan_tasklet(struct tasklet_struct *t) { … } static int admac_device_config(struct dma_chan *chan, struct dma_slave_config *config) { … } static int admac_probe(struct platform_device *pdev) { … } static void admac_remove(struct platform_device *pdev) { … } static const struct of_device_id admac_of_match[] = …; MODULE_DEVICE_TABLE(of, admac_of_match); static struct platform_driver apple_admac_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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