linux/include/linux/soc/ixp4xx/cpu.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * IXP4XX cpu type detection
 *
 * Copyright (C) 2007 MontaVista Software, Inc.
 */

#ifndef __SOC_IXP4XX_CPU_H__
#define __SOC_IXP4XX_CPU_H__

#include <linux/io.h>
#include <linux/regmap.h>
#ifdef CONFIG_ARM
#include <asm/cputype.h>
#endif

/* Processor id value in CP15 Register 0 */
#define IXP42X_PROCESSOR_ID_VALUE …
#define IXP42X_PROCESSOR_ID_MASK …

#define IXP43X_PROCESSOR_ID_VALUE …
#define IXP43X_PROCESSOR_ID_MASK …

#define IXP46X_PROCESSOR_ID_VALUE …
#define IXP46X_PROCESSOR_ID_MASK …

/* Feature register in the expansion bus controller */
#define IXP4XX_EXP_CNFG2 …

/* "fuse" bits of IXP_EXP_CFG2 */
/* All IXP4xx CPUs */
#define IXP4XX_FEATURE_RCOMP …
#define IXP4XX_FEATURE_USB_DEVICE …
#define IXP4XX_FEATURE_HASH …
#define IXP4XX_FEATURE_AES …
#define IXP4XX_FEATURE_DES …
#define IXP4XX_FEATURE_HDLC …
#define IXP4XX_FEATURE_AAL …
#define IXP4XX_FEATURE_HSS …
#define IXP4XX_FEATURE_UTOPIA …
#define IXP4XX_FEATURE_NPEB_ETH0 …
#define IXP4XX_FEATURE_NPEC_ETH …
#define IXP4XX_FEATURE_RESET_NPEA …
#define IXP4XX_FEATURE_RESET_NPEB …
#define IXP4XX_FEATURE_RESET_NPEC …
#define IXP4XX_FEATURE_PCI …
#define IXP4XX_FEATURE_UTOPIA_PHY_LIMIT …
#define IXP4XX_FEATURE_XSCALE_MAX_FREQ …
#define IXP42X_FEATURE_MASK …


/* IXP43x/46x CPUs */
#define IXP4XX_FEATURE_ECC_TIMESYNC …
#define IXP4XX_FEATURE_USB_HOST …
#define IXP4XX_FEATURE_NPEA_ETH …
#define IXP43X_FEATURE_MASK …

/* IXP46x CPU (including IXP455) only */
#define IXP4XX_FEATURE_NPEB_ETH_1_TO_3 …
#define IXP4XX_FEATURE_RSA …
#define IXP46X_FEATURE_MASK …

#ifdef CONFIG_ARCH_IXP4XX
#define cpu_is_ixp42x_rev_a0 …
#define cpu_is_ixp42x …
#define cpu_is_ixp43x …
#define cpu_is_ixp46x …
static inline u32 cpu_ixp4xx_features(struct regmap *rmap)
{
	u32 val;

	regmap_read(rmap, IXP4XX_EXP_CNFG2, &val);
	/* For some reason this register is inverted */
	val = ~val;
	if (cpu_is_ixp42x_rev_a0())
		return IXP42X_FEATURE_MASK & ~(IXP4XX_FEATURE_RCOMP |
					       IXP4XX_FEATURE_AES);
	if (cpu_is_ixp42x())
		return val & IXP42X_FEATURE_MASK;
	if (cpu_is_ixp43x())
		return val & IXP43X_FEATURE_MASK;
	return val & IXP46X_FEATURE_MASK;
}
#else
#define cpu_is_ixp42x_rev_a0() …
#define cpu_is_ixp42x() …
#define cpu_is_ixp43x() …
#define cpu_is_ixp46x() …
static inline u32 cpu_ixp4xx_features(struct regmap *rmap)
{ … }
#endif

#endif  /* _ASM_ARCH_CPU_H */