linux/drivers/soc/litex/litex_soc_ctrl.c

// SPDX-License-Identifier: GPL-2.0
/*
 * LiteX SoC Controller Driver
 *
 * Copyright (C) 2020 Antmicro <www.antmicro.com>
 *
 */

#include <linux/litex.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/printk.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/reboot.h>

/* reset register located at the base address */
#define RESET_REG_OFF …
#define RESET_REG_VALUE …

#define SCRATCH_REG_OFF …
#define SCRATCH_REG_VALUE …
#define SCRATCH_TEST_VALUE …

/*
 * Check LiteX CSR read/write access
 *
 * This function reads and writes a scratch register in order to verify if CSR
 * access works.
 *
 * In case any problems are detected, the driver should panic.
 *
 * Access to the LiteX CSR is, by design, done in CPU native endianness.
 * The driver should not dynamically configure access functions when
 * the endianness mismatch is detected. Such situation indicates problems in
 * the soft SoC design and should be solved at the LiteX generator level,
 * not in the software.
 */
static int litex_check_csr_access(void __iomem *reg_addr)
{ … }

struct litex_soc_ctrl_device { … };

static int litex_reset_handler(struct notifier_block *this, unsigned long mode,
			       void *cmd)
{ … }

static const struct of_device_id litex_soc_ctrl_of_match[] = …;
MODULE_DEVICE_TABLE(of, litex_soc_ctrl_of_match);

static int litex_soc_ctrl_probe(struct platform_device *pdev)
{ … }

static void litex_soc_ctrl_remove(struct platform_device *pdev)
{ … }

static struct platform_driver litex_soc_ctrl_driver = …;

module_platform_driver(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_AUTHOR(…) …;
MODULE_LICENSE(…) …;