linux/drivers/soc/mediatek/mtk-mutex.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2015 MediaTek Inc.
 */

#include <linux/clk.h>
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/soc/mediatek/mtk-mmsys.h>
#include <linux/soc/mediatek/mtk-mutex.h>
#include <linux/soc/mediatek/mtk-cmdq.h>

#define MTK_MUTEX_MAX_HANDLES

#define MT2701_MUTEX0_MOD0
#define MT2701_MUTEX0_SOF0
#define MT8183_MUTEX0_MOD0
#define MT8183_MUTEX0_SOF0

#define DISP_REG_MUTEX_EN(n)
#define DISP_REG_MUTEX(n)
#define DISP_REG_MUTEX_RST(n)
#define DISP_REG_MUTEX_MOD(mutex_mod_reg, n)
#define DISP_REG_MUTEX_MOD1(mutex_mod_reg, n)
#define DISP_REG_MUTEX_SOF(mutex_sof_reg, n)
#define DISP_REG_MUTEX_MOD2(n)

#define INT_MUTEX

#define MT8186_MUTEX_MOD_DISP_OVL0
#define MT8186_MUTEX_MOD_DISP_OVL0_2L
#define MT8186_MUTEX_MOD_DISP_RDMA0
#define MT8186_MUTEX_MOD_DISP_COLOR0
#define MT8186_MUTEX_MOD_DISP_CCORR0
#define MT8186_MUTEX_MOD_DISP_AAL0
#define MT8186_MUTEX_MOD_DISP_GAMMA0
#define MT8186_MUTEX_MOD_DISP_POSTMASK0
#define MT8186_MUTEX_MOD_DISP_DITHER0
#define MT8186_MUTEX_MOD_DISP_RDMA1

#define MT8186_MUTEX_SOF_SINGLE_MODE
#define MT8186_MUTEX_SOF_DSI0
#define MT8186_MUTEX_SOF_DPI0
#define MT8186_MUTEX_EOF_DSI0
#define MT8186_MUTEX_EOF_DPI0

#define MT8167_MUTEX_MOD_DISP_PWM
#define MT8167_MUTEX_MOD_DISP_OVL0
#define MT8167_MUTEX_MOD_DISP_OVL1
#define MT8167_MUTEX_MOD_DISP_RDMA0
#define MT8167_MUTEX_MOD_DISP_RDMA1
#define MT8167_MUTEX_MOD_DISP_WDMA0
#define MT8167_MUTEX_MOD_DISP_CCORR
#define MT8167_MUTEX_MOD_DISP_COLOR
#define MT8167_MUTEX_MOD_DISP_AAL
#define MT8167_MUTEX_MOD_DISP_GAMMA
#define MT8167_MUTEX_MOD_DISP_DITHER
#define MT8167_MUTEX_MOD_DISP_UFOE

#define MT8192_MUTEX_MOD_DISP_OVL0
#define MT8192_MUTEX_MOD_DISP_OVL0_2L
#define MT8192_MUTEX_MOD_DISP_RDMA0
#define MT8192_MUTEX_MOD_DISP_COLOR0
#define MT8192_MUTEX_MOD_DISP_CCORR0
#define MT8192_MUTEX_MOD_DISP_AAL0
#define MT8192_MUTEX_MOD_DISP_GAMMA0
#define MT8192_MUTEX_MOD_DISP_POSTMASK0
#define MT8192_MUTEX_MOD_DISP_DITHER0
#define MT8192_MUTEX_MOD_DISP_OVL2_2L
#define MT8192_MUTEX_MOD_DISP_RDMA4

#define MT8183_MUTEX_MOD_DISP_RDMA0
#define MT8183_MUTEX_MOD_DISP_RDMA1
#define MT8183_MUTEX_MOD_DISP_OVL0
#define MT8183_MUTEX_MOD_DISP_OVL0_2L
#define MT8183_MUTEX_MOD_DISP_OVL1_2L
#define MT8183_MUTEX_MOD_DISP_WDMA0
#define MT8183_MUTEX_MOD_DISP_COLOR0
#define MT8183_MUTEX_MOD_DISP_CCORR0
#define MT8183_MUTEX_MOD_DISP_AAL0
#define MT8183_MUTEX_MOD_DISP_GAMMA0
#define MT8183_MUTEX_MOD_DISP_DITHER0

#define MT8183_MUTEX_MOD_MDP_RDMA0
#define MT8183_MUTEX_MOD_MDP_RSZ0
#define MT8183_MUTEX_MOD_MDP_RSZ1
#define MT8183_MUTEX_MOD_MDP_TDSHP0
#define MT8183_MUTEX_MOD_MDP_WROT0
#define MT8183_MUTEX_MOD_MDP_WDMA
#define MT8183_MUTEX_MOD_MDP_AAL0
#define MT8183_MUTEX_MOD_MDP_CCORR0

#define MT8186_MUTEX_MOD_MDP_RDMA0
#define MT8186_MUTEX_MOD_MDP_AAL0
#define MT8186_MUTEX_MOD_MDP_HDR0
#define MT8186_MUTEX_MOD_MDP_RSZ0
#define MT8186_MUTEX_MOD_MDP_RSZ1
#define MT8186_MUTEX_MOD_MDP_WROT0
#define MT8186_MUTEX_MOD_MDP_TDSHP0
#define MT8186_MUTEX_MOD_MDP_COLOR0

#define MT8173_MUTEX_MOD_DISP_OVL0
#define MT8173_MUTEX_MOD_DISP_OVL1
#define MT8173_MUTEX_MOD_DISP_RDMA0
#define MT8173_MUTEX_MOD_DISP_RDMA1
#define MT8173_MUTEX_MOD_DISP_RDMA2
#define MT8173_MUTEX_MOD_DISP_WDMA0
#define MT8173_MUTEX_MOD_DISP_WDMA1
#define MT8173_MUTEX_MOD_DISP_COLOR0
#define MT8173_MUTEX_MOD_DISP_COLOR1
#define MT8173_MUTEX_MOD_DISP_AAL
#define MT8173_MUTEX_MOD_DISP_GAMMA
#define MT8173_MUTEX_MOD_DISP_UFOE
#define MT8173_MUTEX_MOD_DISP_PWM0
#define MT8173_MUTEX_MOD_DISP_PWM1
#define MT8173_MUTEX_MOD_DISP_OD

#define MT8188_MUTEX_MOD_DISP_OVL0
#define MT8188_MUTEX_MOD_DISP_WDMA0
#define MT8188_MUTEX_MOD_DISP_RDMA0
#define MT8188_MUTEX_MOD_DISP_COLOR0
#define MT8188_MUTEX_MOD_DISP_CCORR0
#define MT8188_MUTEX_MOD_DISP_AAL0
#define MT8188_MUTEX_MOD_DISP_GAMMA0
#define MT8188_MUTEX_MOD_DISP_DITHER0
#define MT8188_MUTEX_MOD_DISP_DSI0
#define MT8188_MUTEX_MOD_DISP_DSC_WRAP0_CORE0
#define MT8188_MUTEX_MOD_DISP_VPP_MERGE
#define MT8188_MUTEX_MOD_DISP_DP_INTF0
#define MT8188_MUTEX_MOD_DISP_POSTMASK0
#define MT8188_MUTEX_MOD2_DISP_PWM0

#define MT8188_MUTEX_MOD_DISP1_MDP_RDMA0
#define MT8188_MUTEX_MOD_DISP1_MDP_RDMA1
#define MT8188_MUTEX_MOD_DISP1_MDP_RDMA2
#define MT8188_MUTEX_MOD_DISP1_MDP_RDMA3
#define MT8188_MUTEX_MOD_DISP1_MDP_RDMA4
#define MT8188_MUTEX_MOD_DISP1_MDP_RDMA5
#define MT8188_MUTEX_MOD_DISP1_MDP_RDMA6
#define MT8188_MUTEX_MOD_DISP1_MDP_RDMA7
#define MT8188_MUTEX_MOD_DISP1_PADDING0
#define MT8188_MUTEX_MOD_DISP1_PADDING1
#define MT8188_MUTEX_MOD_DISP1_PADDING2
#define MT8188_MUTEX_MOD_DISP1_PADDING3
#define MT8188_MUTEX_MOD_DISP1_PADDING4
#define MT8188_MUTEX_MOD_DISP1_PADDING5
#define MT8188_MUTEX_MOD_DISP1_PADDING6
#define MT8188_MUTEX_MOD_DISP1_PADDING7
#define MT8188_MUTEX_MOD_DISP1_VPP_MERGE0
#define MT8188_MUTEX_MOD_DISP1_VPP_MERGE1
#define MT8188_MUTEX_MOD_DISP1_VPP_MERGE2
#define MT8188_MUTEX_MOD_DISP1_VPP_MERGE3
#define MT8188_MUTEX_MOD_DISP1_VPP_MERGE4
#define MT8188_MUTEX_MOD_DISP1_DISP_MIXER
#define MT8188_MUTEX_MOD_DISP1_DP_INTF1

#define MT8195_MUTEX_MOD_DISP_OVL0
#define MT8195_MUTEX_MOD_DISP_WDMA0
#define MT8195_MUTEX_MOD_DISP_RDMA0
#define MT8195_MUTEX_MOD_DISP_COLOR0
#define MT8195_MUTEX_MOD_DISP_CCORR0
#define MT8195_MUTEX_MOD_DISP_AAL0
#define MT8195_MUTEX_MOD_DISP_GAMMA0
#define MT8195_MUTEX_MOD_DISP_DITHER0
#define MT8195_MUTEX_MOD_DISP_DSI0
#define MT8195_MUTEX_MOD_DISP_DSC_WRAP0_CORE0
#define MT8195_MUTEX_MOD_DISP_VPP_MERGE
#define MT8195_MUTEX_MOD_DISP_DP_INTF0
#define MT8195_MUTEX_MOD_DISP_PWM0

#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA0
#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA1
#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA2
#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA3
#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA4
#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA5
#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA6
#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA7
#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE0
#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE1
#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE2
#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE3
#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE4
#define MT8195_MUTEX_MOD_DISP1_DISP_MIXER
#define MT8195_MUTEX_MOD_DISP1_DPI0
#define MT8195_MUTEX_MOD_DISP1_DPI1
#define MT8195_MUTEX_MOD_DISP1_DP_INTF0

/* VPPSYS0 */
#define MT8195_MUTEX_MOD_MDP_RDMA0
#define MT8195_MUTEX_MOD_MDP_FG0
#define MT8195_MUTEX_MOD_MDP_STITCH0
#define MT8195_MUTEX_MOD_MDP_HDR0
#define MT8195_MUTEX_MOD_MDP_AAL0
#define MT8195_MUTEX_MOD_MDP_RSZ0
#define MT8195_MUTEX_MOD_MDP_TDSHP0
#define MT8195_MUTEX_MOD_MDP_COLOR0
#define MT8195_MUTEX_MOD_MDP_OVL0
#define MT8195_MUTEX_MOD_MDP_PAD0
#define MT8195_MUTEX_MOD_MDP_TCC0
#define MT8195_MUTEX_MOD_MDP_WROT0

/* VPPSYS1 */
#define MT8195_MUTEX_MOD_MDP_TCC1
#define MT8195_MUTEX_MOD_MDP_RDMA1
#define MT8195_MUTEX_MOD_MDP_RDMA2
#define MT8195_MUTEX_MOD_MDP_RDMA3
#define MT8195_MUTEX_MOD_MDP_FG1
#define MT8195_MUTEX_MOD_MDP_FG2
#define MT8195_MUTEX_MOD_MDP_FG3
#define MT8195_MUTEX_MOD_MDP_HDR1
#define MT8195_MUTEX_MOD_MDP_HDR2
#define MT8195_MUTEX_MOD_MDP_HDR3
#define MT8195_MUTEX_MOD_MDP_AAL1
#define MT8195_MUTEX_MOD_MDP_AAL2
#define MT8195_MUTEX_MOD_MDP_AAL3
#define MT8195_MUTEX_MOD_MDP_RSZ1
#define MT8195_MUTEX_MOD_MDP_RSZ2
#define MT8195_MUTEX_MOD_MDP_RSZ3
#define MT8195_MUTEX_MOD_MDP_TDSHP1
#define MT8195_MUTEX_MOD_MDP_TDSHP2
#define MT8195_MUTEX_MOD_MDP_TDSHP3
#define MT8195_MUTEX_MOD_MDP_MERGE2
#define MT8195_MUTEX_MOD_MDP_MERGE3
#define MT8195_MUTEX_MOD_MDP_COLOR1
#define MT8195_MUTEX_MOD_MDP_COLOR2
#define MT8195_MUTEX_MOD_MDP_COLOR3
#define MT8195_MUTEX_MOD_MDP_OVL1
#define MT8195_MUTEX_MOD_MDP_PAD1
#define MT8195_MUTEX_MOD_MDP_PAD2
#define MT8195_MUTEX_MOD_MDP_PAD3
#define MT8195_MUTEX_MOD_MDP_WROT1
#define MT8195_MUTEX_MOD_MDP_WROT2
#define MT8195_MUTEX_MOD_MDP_WROT3

#define MT8365_MUTEX_MOD_DISP_OVL0
#define MT8365_MUTEX_MOD_DISP_OVL0_2L
#define MT8365_MUTEX_MOD_DISP_RDMA0
#define MT8365_MUTEX_MOD_DISP_RDMA1
#define MT8365_MUTEX_MOD_DISP_WDMA0
#define MT8365_MUTEX_MOD_DISP_COLOR0
#define MT8365_MUTEX_MOD_DISP_CCORR
#define MT8365_MUTEX_MOD_DISP_AAL
#define MT8365_MUTEX_MOD_DISP_GAMMA
#define MT8365_MUTEX_MOD_DISP_DITHER
#define MT8365_MUTEX_MOD_DISP_DSI0
#define MT8365_MUTEX_MOD_DISP_PWM0
#define MT8365_MUTEX_MOD_DISP_DPI0

#define MT2712_MUTEX_MOD_DISP_PWM2
#define MT2712_MUTEX_MOD_DISP_OVL0
#define MT2712_MUTEX_MOD_DISP_OVL1
#define MT2712_MUTEX_MOD_DISP_RDMA0
#define MT2712_MUTEX_MOD_DISP_RDMA1
#define MT2712_MUTEX_MOD_DISP_RDMA2
#define MT2712_MUTEX_MOD_DISP_WDMA0
#define MT2712_MUTEX_MOD_DISP_WDMA1
#define MT2712_MUTEX_MOD_DISP_COLOR0
#define MT2712_MUTEX_MOD_DISP_COLOR1
#define MT2712_MUTEX_MOD_DISP_AAL0
#define MT2712_MUTEX_MOD_DISP_UFOE
#define MT2712_MUTEX_MOD_DISP_PWM0
#define MT2712_MUTEX_MOD_DISP_PWM1
#define MT2712_MUTEX_MOD_DISP_OD0
#define MT2712_MUTEX_MOD2_DISP_AAL1
#define MT2712_MUTEX_MOD2_DISP_OD1

#define MT2701_MUTEX_MOD_DISP_OVL
#define MT2701_MUTEX_MOD_DISP_WDMA
#define MT2701_MUTEX_MOD_DISP_COLOR
#define MT2701_MUTEX_MOD_DISP_BLS
#define MT2701_MUTEX_MOD_DISP_RDMA0
#define MT2701_MUTEX_MOD_DISP_RDMA1

#define MT2712_MUTEX_SOF_SINGLE_MODE
#define MT2712_MUTEX_SOF_DSI0
#define MT2712_MUTEX_SOF_DSI1
#define MT2712_MUTEX_SOF_DPI0
#define MT2712_MUTEX_SOF_DPI1
#define MT2712_MUTEX_SOF_DSI2
#define MT2712_MUTEX_SOF_DSI3
#define MT8167_MUTEX_SOF_DPI0
#define MT8167_MUTEX_SOF_DPI1
#define MT8183_MUTEX_SOF_DSI0
#define MT8183_MUTEX_SOF_DPI0
#define MT8188_MUTEX_SOF_DSI0
#define MT8188_MUTEX_SOF_DP_INTF0
#define MT8188_MUTEX_SOF_DP_INTF1
#define MT8195_MUTEX_SOF_DSI0
#define MT8195_MUTEX_SOF_DSI1
#define MT8195_MUTEX_SOF_DP_INTF0
#define MT8195_MUTEX_SOF_DP_INTF1
#define MT8195_MUTEX_SOF_DPI0
#define MT8195_MUTEX_SOF_DPI1

#define MT8183_MUTEX_EOF_DSI0
#define MT8183_MUTEX_EOF_DPI0
#define MT8188_MUTEX_EOF_DSI0
#define MT8188_MUTEX_EOF_DP_INTF0
#define MT8188_MUTEX_EOF_DP_INTF1
#define MT8195_MUTEX_EOF_DSI0
#define MT8195_MUTEX_EOF_DSI1
#define MT8195_MUTEX_EOF_DP_INTF0
#define MT8195_MUTEX_EOF_DP_INTF1
#define MT8195_MUTEX_EOF_DPI0
#define MT8195_MUTEX_EOF_DPI1

struct mtk_mutex {};

enum mtk_mutex_sof_id {};

struct mtk_mutex_data {};

struct mtk_mutex_ctx {};

static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] =;

static const unsigned int mt2712_mutex_mod[DDP_COMPONENT_ID_MAX] =;

static const unsigned int mt8167_mutex_mod[DDP_COMPONENT_ID_MAX] =;

static const unsigned int mt8173_mutex_mod[DDP_COMPONENT_ID_MAX] =;

static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] =;

static const unsigned int mt8183_mutex_table_mod[MUTEX_MOD_IDX_MAX] =;

static const unsigned int mt8186_mutex_mod[DDP_COMPONENT_ID_MAX] =;

static const unsigned int mt8186_mdp_mutex_table_mod[MUTEX_MOD_IDX_MAX] =;

static const unsigned int mt8188_mutex_mod[DDP_COMPONENT_ID_MAX] =;

static const unsigned int mt8188_mdp_mutex_table_mod[MUTEX_MOD_IDX_MAX] =;

static const unsigned int mt8192_mutex_mod[DDP_COMPONENT_ID_MAX] =;

static const unsigned int mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] =;

static const unsigned int mt8195_mutex_table_mod[MUTEX_MOD_IDX_MAX] =;

static const unsigned int mt8365_mutex_mod[DDP_COMPONENT_ID_MAX] =;

static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_MAX] =;

static const unsigned int mt6795_mutex_sof[DDP_MUTEX_SOF_MAX] =;

static const unsigned int mt8167_mutex_sof[DDP_MUTEX_SOF_MAX] =;

/* Add EOF setting so overlay hardware can receive frame done irq */
static const unsigned int mt8183_mutex_sof[DDP_MUTEX_SOF_MAX] =;

static const unsigned int mt8186_mutex_sof[MUTEX_SOF_DSI3 + 1] =;

/*
 * To support refresh mode(video mode), DISP_REG_MUTEX_SOF should
 * select the EOF source and configure the EOF plus timing from the
 * module that provides the timing signal.
 * So that MUTEX can not only send a STREAM_DONE event to GCE
 * but also detect the error at end of frame(EAEOF) when EOF signal
 * arrives.
 */
static const unsigned int mt8188_mutex_sof[DDP_MUTEX_SOF_MAX] =;

static const unsigned int mt8195_mutex_sof[DDP_MUTEX_SOF_MAX] =;

static const struct mtk_mutex_data mt2701_mutex_driver_data =;

static const struct mtk_mutex_data mt2712_mutex_driver_data =;

static const struct mtk_mutex_data mt6795_mutex_driver_data =;

static const struct mtk_mutex_data mt8167_mutex_driver_data =;

static const struct mtk_mutex_data mt8173_mutex_driver_data =;

static const struct mtk_mutex_data mt8183_mutex_driver_data =;

static const struct mtk_mutex_data mt8186_mdp_mutex_driver_data =;

static const struct mtk_mutex_data mt8186_mutex_driver_data =;

static const struct mtk_mutex_data mt8188_mutex_driver_data =;

static const struct mtk_mutex_data mt8188_vpp_mutex_driver_data =;

static const struct mtk_mutex_data mt8192_mutex_driver_data =;

static const struct mtk_mutex_data mt8195_mutex_driver_data =;

static const struct mtk_mutex_data mt8195_vpp_mutex_driver_data =;

static const struct mtk_mutex_data mt8365_mutex_driver_data =;

struct mtk_mutex *mtk_mutex_get(struct device *dev)
{}
EXPORT_SYMBOL_GPL();

void mtk_mutex_put(struct mtk_mutex *mutex)
{}
EXPORT_SYMBOL_GPL();

int mtk_mutex_prepare(struct mtk_mutex *mutex)
{}
EXPORT_SYMBOL_GPL();

void mtk_mutex_unprepare(struct mtk_mutex *mutex)
{}
EXPORT_SYMBOL_GPL();

void mtk_mutex_add_comp(struct mtk_mutex *mutex,
			enum mtk_ddp_comp_id id)
{}
EXPORT_SYMBOL_GPL();

void mtk_mutex_remove_comp(struct mtk_mutex *mutex,
			   enum mtk_ddp_comp_id id)
{}
EXPORT_SYMBOL_GPL();

void mtk_mutex_enable(struct mtk_mutex *mutex)
{}
EXPORT_SYMBOL_GPL();

int mtk_mutex_enable_by_cmdq(struct mtk_mutex *mutex, void *pkt)
{}
EXPORT_SYMBOL_GPL();

void mtk_mutex_disable(struct mtk_mutex *mutex)
{}
EXPORT_SYMBOL_GPL();

void mtk_mutex_acquire(struct mtk_mutex *mutex)
{}
EXPORT_SYMBOL_GPL();

void mtk_mutex_release(struct mtk_mutex *mutex)
{}
EXPORT_SYMBOL_GPL();

int mtk_mutex_write_mod(struct mtk_mutex *mutex,
			enum mtk_mutex_mod_index idx, bool clear)
{}
EXPORT_SYMBOL_GPL();

int mtk_mutex_write_sof(struct mtk_mutex *mutex,
			enum mtk_mutex_sof_index idx)
{}
EXPORT_SYMBOL_GPL();

static int mtk_mutex_probe(struct platform_device *pdev)
{}

static const struct of_device_id mutex_driver_dt_match[] =;
MODULE_DEVICE_TABLE(of, mutex_driver_dt_match);

static struct platform_driver mtk_mutex_driver =;
module_platform_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();