// SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. /* Disable MMIO tracing to prevent excessive logging of unwanted MMIO traces */ #define __DISABLE_TRACE_MMIO__ #include <linux/acpi.h> #include <linux/clk.h> #include <linux/slab.h> #include <linux/dma-mapping.h> #include <linux/io.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_platform.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> #include <linux/soc/qcom/geni-se.h> /** * DOC: Overview * * Generic Interface (GENI) Serial Engine (SE) Wrapper driver is introduced * to manage GENI firmware based Qualcomm Universal Peripheral (QUP) Wrapper * controller. QUP Wrapper is designed to support various serial bus protocols * like UART, SPI, I2C, I3C, etc. */ /** * DOC: Hardware description * * GENI based QUP is a highly-flexible and programmable module for supporting * a wide range of serial interfaces like UART, SPI, I2C, I3C, etc. A single * QUP module can provide upto 8 serial interfaces, using its internal * serial engines. The actual configuration is determined by the target * platform configuration. The protocol supported by each interface is * determined by the firmware loaded to the serial engine. Each SE consists * of a DMA Engine and GENI sub modules which enable serial engines to * support FIFO and DMA modes of operation. * * * +-----------------------------------------+ * |QUP Wrapper | * | +----------------------------+ | * --QUP & SE Clocks--> | Serial Engine N | +-IO------> * | | ... | | Interface * <---Clock Perf.----+ +----+-----------------------+ | | * State Interface | | Serial Engine 1 | | | * | | | | | * | | | | | * <--------AHB-------> | | | | * | | +----+ | * | | | | * | | | | * <------SE IRQ------+ +----------------------------+ | * | | * +-----------------------------------------+ * * Figure 1: GENI based QUP Wrapper * * The GENI submodules include primary and secondary sequencers which are * used to drive TX & RX operations. On serial interfaces that operate using * master-slave model, primary sequencer drives both TX & RX operations. On * serial interfaces that operate using peer-to-peer model, primary sequencer * drives TX operation and secondary sequencer drives RX operation. */ /** * DOC: Software description * * GENI SE Wrapper driver is structured into 2 parts: * * geni_wrapper represents QUP Wrapper controller. This part of the driver * manages QUP Wrapper information such as hardware version, clock * performance table that is common to all the internal serial engines. * * geni_se represents serial engine. This part of the driver manages serial * engine information such as clocks, containing QUP Wrapper, etc. This part * of driver also supports operations (eg. initialize the concerned serial * engine, select between FIFO and DMA mode of operation etc.) that are * common to all the serial engines and are independent of serial interfaces. */ #define MAX_CLK_PERF_LEVEL … #define MAX_CLKS … /** * struct geni_wrapper - Data structure to represent the QUP Wrapper Core * @dev: Device pointer of the QUP wrapper core * @base: Base address of this instance of QUP wrapper core * @clks: Handle to the primary & optional secondary AHB clocks * @num_clks: Count of clocks */ struct geni_wrapper { … }; /** * struct geni_se_desc - Data structure to represent the QUP Wrapper resources * @clks: Name of the primary & optional secondary AHB clocks * @num_clks: Count of clock names */ struct geni_se_desc { … }; static const char * const icc_path_names[] = …; #define QUP_HW_VER_REG … /* Common SE registers */ #define GENI_INIT_CFG_REVISION … #define GENI_S_INIT_CFG_REVISION … #define GENI_OUTPUT_CTRL … #define GENI_CGC_CTRL … #define GENI_CLK_CTRL_RO … #define GENI_FW_S_REVISION_RO … #define SE_GENI_BYTE_GRAN … #define SE_GENI_TX_PACKING_CFG0 … #define SE_GENI_TX_PACKING_CFG1 … #define SE_GENI_RX_PACKING_CFG0 … #define SE_GENI_RX_PACKING_CFG1 … #define SE_GENI_M_GP_LENGTH … #define SE_GENI_S_GP_LENGTH … #define SE_DMA_TX_PTR_L … #define SE_DMA_TX_PTR_H … #define SE_DMA_TX_ATTR … #define SE_DMA_TX_LEN … #define SE_DMA_TX_IRQ_EN … #define SE_DMA_TX_IRQ_EN_SET … #define SE_DMA_TX_IRQ_EN_CLR … #define SE_DMA_TX_LEN_IN … #define SE_DMA_TX_MAX_BURST … #define SE_DMA_RX_PTR_L … #define SE_DMA_RX_PTR_H … #define SE_DMA_RX_ATTR … #define SE_DMA_RX_LEN … #define SE_DMA_RX_IRQ_EN … #define SE_DMA_RX_IRQ_EN_SET … #define SE_DMA_RX_IRQ_EN_CLR … #define SE_DMA_RX_LEN_IN … #define SE_DMA_RX_MAX_BURST … #define SE_DMA_RX_FLUSH … #define SE_GSI_EVENT_EN … #define SE_IRQ_EN … #define SE_DMA_GENERAL_CFG … /* GENI_OUTPUT_CTRL fields */ #define DEFAULT_IO_OUTPUT_CTRL_MSK … /* GENI_CGC_CTRL fields */ #define CFG_AHB_CLK_CGC_ON … #define CFG_AHB_WR_ACLK_CGC_ON … #define DATA_AHB_CLK_CGC_ON … #define SCLK_CGC_ON … #define TX_CLK_CGC_ON … #define RX_CLK_CGC_ON … #define EXT_CLK_CGC_ON … #define PROG_RAM_HCLK_OFF … #define PROG_RAM_SCLK_OFF … #define DEFAULT_CGC_EN … /* SE_GSI_EVENT_EN fields */ #define DMA_RX_EVENT_EN … #define DMA_TX_EVENT_EN … #define GENI_M_EVENT_EN … #define GENI_S_EVENT_EN … /* SE_IRQ_EN fields */ #define DMA_RX_IRQ_EN … #define DMA_TX_IRQ_EN … #define GENI_M_IRQ_EN … #define GENI_S_IRQ_EN … /* SE_DMA_GENERAL_CFG */ #define DMA_RX_CLK_CGC_ON … #define DMA_TX_CLK_CGC_ON … #define DMA_AHB_SLV_CFG_ON … #define AHB_SEC_SLV_CLK_CGC_ON … #define DUMMY_RX_NON_BUFFERABLE … #define RX_DMA_ZERO_PADDING_EN … #define RX_DMA_IRQ_DELAY_MSK … #define RX_DMA_IRQ_DELAY_SHFT … /** * geni_se_get_qup_hw_version() - Read the QUP wrapper Hardware version * @se: Pointer to the corresponding serial engine. * * Return: Hardware Version of the wrapper. */ u32 geni_se_get_qup_hw_version(struct geni_se *se) { … } EXPORT_SYMBOL_GPL(…); static void geni_se_io_set_mode(void __iomem *base) { … } static void geni_se_io_init(void __iomem *base) { … } static void geni_se_irq_clear(struct geni_se *se) { … } /** * geni_se_init() - Initialize the GENI serial engine * @se: Pointer to the concerned serial engine. * @rx_wm: Receive watermark, in units of FIFO words. * @rx_rfr: Ready-for-receive watermark, in units of FIFO words. * * This function is used to initialize the GENI serial engine, configure * receive watermark and ready-for-receive watermarks. */ void geni_se_init(struct geni_se *se, u32 rx_wm, u32 rx_rfr) { … } EXPORT_SYMBOL_GPL(…); static void geni_se_select_fifo_mode(struct geni_se *se) { … } static void geni_se_select_dma_mode(struct geni_se *se) { … } static void geni_se_select_gpi_mode(struct geni_se *se) { … } /** * geni_se_select_mode() - Select the serial engine transfer mode * @se: Pointer to the concerned serial engine. * @mode: Transfer mode to be selected. */ void geni_se_select_mode(struct geni_se *se, enum geni_se_xfer_mode mode) { … } EXPORT_SYMBOL_GPL(…); /** * DOC: Overview * * GENI FIFO packing is highly configurable. TX/RX packing/unpacking consist * of up to 4 operations, each operation represented by 4 configuration vectors * of 10 bits programmed in GENI_TX_PACKING_CFG0 and GENI_TX_PACKING_CFG1 for * TX FIFO and in GENI_RX_PACKING_CFG0 and GENI_RX_PACKING_CFG1 for RX FIFO. * Refer to below examples for detailed bit-field description. * * Example 1: word_size = 7, packing_mode = 4 x 8, msb_to_lsb = 1 * * +-----------+-------+-------+-------+-------+ * | | vec_0 | vec_1 | vec_2 | vec_3 | * +-----------+-------+-------+-------+-------+ * | start | 0x6 | 0xe | 0x16 | 0x1e | * | direction | 1 | 1 | 1 | 1 | * | length | 6 | 6 | 6 | 6 | * | stop | 0 | 0 | 0 | 1 | * +-----------+-------+-------+-------+-------+ * * Example 2: word_size = 15, packing_mode = 2 x 16, msb_to_lsb = 0 * * +-----------+-------+-------+-------+-------+ * | | vec_0 | vec_1 | vec_2 | vec_3 | * +-----------+-------+-------+-------+-------+ * | start | 0x0 | 0x8 | 0x10 | 0x18 | * | direction | 0 | 0 | 0 | 0 | * | length | 7 | 6 | 7 | 6 | * | stop | 0 | 0 | 0 | 1 | * +-----------+-------+-------+-------+-------+ * * Example 3: word_size = 23, packing_mode = 1 x 32, msb_to_lsb = 1 * * +-----------+-------+-------+-------+-------+ * | | vec_0 | vec_1 | vec_2 | vec_3 | * +-----------+-------+-------+-------+-------+ * | start | 0x16 | 0xe | 0x6 | 0x0 | * | direction | 1 | 1 | 1 | 1 | * | length | 7 | 7 | 6 | 0 | * | stop | 0 | 0 | 1 | 0 | * +-----------+-------+-------+-------+-------+ * */ #define NUM_PACKING_VECTORS … #define PACKING_START_SHIFT … #define PACKING_DIR_SHIFT … #define PACKING_LEN_SHIFT … #define PACKING_STOP_BIT … #define PACKING_VECTOR_SHIFT … /** * geni_se_config_packing() - Packing configuration of the serial engine * @se: Pointer to the concerned serial engine * @bpw: Bits of data per transfer word. * @pack_words: Number of words per fifo element. * @msb_to_lsb: Transfer from MSB to LSB or vice-versa. * @tx_cfg: Flag to configure the TX Packing. * @rx_cfg: Flag to configure the RX Packing. * * This function is used to configure the packing rules for the current * transfer. */ void geni_se_config_packing(struct geni_se *se, int bpw, int pack_words, bool msb_to_lsb, bool tx_cfg, bool rx_cfg) { … } EXPORT_SYMBOL_GPL(…); static void geni_se_clks_off(struct geni_se *se) { … } /** * geni_se_resources_off() - Turn off resources associated with the serial * engine * @se: Pointer to the concerned serial engine. * * Return: 0 on success, standard Linux error codes on failure/error. */ int geni_se_resources_off(struct geni_se *se) { … } EXPORT_SYMBOL_GPL(…); static int geni_se_clks_on(struct geni_se *se) { … } /** * geni_se_resources_on() - Turn on resources associated with the serial * engine * @se: Pointer to the concerned serial engine. * * Return: 0 on success, standard Linux error codes on failure/error. */ int geni_se_resources_on(struct geni_se *se) { … } EXPORT_SYMBOL_GPL(…); /** * geni_se_clk_tbl_get() - Get the clock table to program DFS * @se: Pointer to the concerned serial engine. * @tbl: Table in which the output is returned. * * This function is called by the protocol drivers to determine the different * clock frequencies supported by serial engine core clock. The protocol * drivers use the output to determine the clock frequency index to be * programmed into DFS. * * Return: number of valid performance levels in the table on success, * standard Linux error codes on failure. */ int geni_se_clk_tbl_get(struct geni_se *se, unsigned long **tbl) { … } EXPORT_SYMBOL_GPL(…); /** * geni_se_clk_freq_match() - Get the matching or closest SE clock frequency * @se: Pointer to the concerned serial engine. * @req_freq: Requested clock frequency. * @index: Index of the resultant frequency in the table. * @res_freq: Resultant frequency of the source clock. * @exact: Flag to indicate exact multiple requirement of the requested * frequency. * * This function is called by the protocol drivers to determine the best match * of the requested frequency as provided by the serial engine clock in order * to meet the performance requirements. * * If we return success: * - if @exact is true then @res_freq / <an_integer> == @req_freq * - if @exact is false then @res_freq / <an_integer> <= @req_freq * * Return: 0 on success, standard Linux error codes on failure. */ int geni_se_clk_freq_match(struct geni_se *se, unsigned long req_freq, unsigned int *index, unsigned long *res_freq, bool exact) { … } EXPORT_SYMBOL_GPL(…); #define GENI_SE_DMA_DONE_EN … #define GENI_SE_DMA_EOT_EN … #define GENI_SE_DMA_AHB_ERR_EN … #define GENI_SE_DMA_EOT_BUF … /** * geni_se_tx_init_dma() - Initiate TX DMA transfer on the serial engine * @se: Pointer to the concerned serial engine. * @iova: Mapped DMA address. * @len: Length of the TX buffer. * * This function is used to initiate DMA TX transfer. */ void geni_se_tx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len) { … } EXPORT_SYMBOL_GPL(…); /** * geni_se_tx_dma_prep() - Prepare the serial engine for TX DMA transfer * @se: Pointer to the concerned serial engine. * @buf: Pointer to the TX buffer. * @len: Length of the TX buffer. * @iova: Pointer to store the mapped DMA address. * * This function is used to prepare the buffers for DMA TX. * * Return: 0 on success, standard Linux error codes on failure. */ int geni_se_tx_dma_prep(struct geni_se *se, void *buf, size_t len, dma_addr_t *iova) { … } EXPORT_SYMBOL_GPL(…); /** * geni_se_rx_init_dma() - Initiate RX DMA transfer on the serial engine * @se: Pointer to the concerned serial engine. * @iova: Mapped DMA address. * @len: Length of the RX buffer. * * This function is used to initiate DMA RX transfer. */ void geni_se_rx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len) { … } EXPORT_SYMBOL_GPL(…); /** * geni_se_rx_dma_prep() - Prepare the serial engine for RX DMA transfer * @se: Pointer to the concerned serial engine. * @buf: Pointer to the RX buffer. * @len: Length of the RX buffer. * @iova: Pointer to store the mapped DMA address. * * This function is used to prepare the buffers for DMA RX. * * Return: 0 on success, standard Linux error codes on failure. */ int geni_se_rx_dma_prep(struct geni_se *se, void *buf, size_t len, dma_addr_t *iova) { … } EXPORT_SYMBOL_GPL(…); /** * geni_se_tx_dma_unprep() - Unprepare the serial engine after TX DMA transfer * @se: Pointer to the concerned serial engine. * @iova: DMA address of the TX buffer. * @len: Length of the TX buffer. * * This function is used to unprepare the DMA buffers after DMA TX. */ void geni_se_tx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len) { … } EXPORT_SYMBOL_GPL(…); /** * geni_se_rx_dma_unprep() - Unprepare the serial engine after RX DMA transfer * @se: Pointer to the concerned serial engine. * @iova: DMA address of the RX buffer. * @len: Length of the RX buffer. * * This function is used to unprepare the DMA buffers after DMA RX. */ void geni_se_rx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len) { … } EXPORT_SYMBOL_GPL(…); int geni_icc_get(struct geni_se *se, const char *icc_ddr) { … } EXPORT_SYMBOL_GPL(…); int geni_icc_set_bw(struct geni_se *se) { … } EXPORT_SYMBOL_GPL(…); void geni_icc_set_tag(struct geni_se *se, u32 tag) { … } EXPORT_SYMBOL_GPL(…); /* To do: Replace this by icc_bulk_enable once it's implemented in ICC core */ int geni_icc_enable(struct geni_se *se) { … } EXPORT_SYMBOL_GPL(…); int geni_icc_disable(struct geni_se *se) { … } EXPORT_SYMBOL_GPL(…); static int geni_se_probe(struct platform_device *pdev) { … } static const char * const qup_clks[] = …; static const struct geni_se_desc qup_desc = …; static const char * const i2c_master_hub_clks[] = …; static const struct geni_se_desc i2c_master_hub_desc = …; static const struct of_device_id geni_se_dt_match[] = …; MODULE_DEVICE_TABLE(of, geni_se_dt_match); static struct platform_driver geni_se_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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