linux/drivers/soc/mediatek/mt8365-mmsys.h

/* SPDX-License-Identifier: GPL-2.0-only */

#ifndef __SOC_MEDIATEK_MT8365_MMSYS_H
#define __SOC_MEDIATEK_MT8365_MMSYS_H

#define MT8365_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN …
#define MT8365_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL …
#define MT8365_DISP_REG_CONFIG_DISP_DITHER0_MOUT_EN …
#define MT8365_DISP_REG_CONFIG_DISP_RDMA0_SEL_IN …
#define MT8365_DISP_REG_CONFIG_DISP_RDMA0_RSZ0_SEL_IN …
#define MT8365_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN …
#define MT8365_DISP_REG_CONFIG_DISP_DSI0_SEL_IN …
#define MT8365_DISP_REG_CONFIG_DISP_RDMA1_SOUT_SEL …
#define MT8365_DISP_REG_CONFIG_DISP_DPI0_SEL_IN …
#define MT8365_DISP_REG_CONFIG_DISP_LVDS_SYS_CFG_00 …

#define MT8365_RDMA0_SOUT_COLOR0 …
#define MT8365_DITHER_MOUT_EN_DSI0 …
#define MT8365_DSI0_SEL_IN_DITHER …
#define MT8365_RDMA0_SEL_IN_OVL0 …
#define MT8365_RDMA0_RSZ0_SEL_IN_RDMA0 …
#define MT8365_DISP_COLOR_SEL_IN_COLOR0 …
#define MT8365_OVL0_MOUT_PATH0_SEL …
#define MT8365_RDMA1_SOUT_DPI0 …
#define MT8365_DPI0_SEL_IN_RDMA1 …
#define MT8365_LVDS_SYS_CFG_00_SEL_LVDS_PXL_CLK …
#define MT8365_DPI0_SEL_IN_RDMA1 …

static const struct mtk_mmsys_routes mt8365_mmsys_routing_table[] = …;

#endif /* __SOC_MEDIATEK_MT8365_MMSYS_H */