linux/drivers/soc/renesas/rcar-rst.c

// SPDX-License-Identifier: GPL-2.0
/*
 * R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
 *
 * Copyright (C) 2016 Glider bvba
 */

#include <linux/err.h>
#include <linux/io.h>
#include <linux/of_address.h>
#include <linux/soc/renesas/rcar-rst.h>

#define WDTRSTCR_RESET …
#define WDTRSTCR …
#define GEN4_WDTRSTCR …

#define CR7BAR …
#define CR7BAREN …
#define CR7BAR_MASK …

static void __iomem *rcar_rst_base;
static u32 saved_mode __initdata;
static int (*rcar_rst_set_rproc_boot_addr_func)(u64 boot_addr);

static int rcar_rst_enable_wdt_reset(void __iomem *base)
{ … }

static int rcar_rst_v3u_enable_wdt_reset(void __iomem *base)
{ … }

/*
 * Most of the R-Car Gen3 SoCs have an ARM Realtime Core.
 * Firmware boot address has to be set in CR7BAR before
 * starting the realtime core.
 * Boot address must be aligned on a 256k boundary.
 */
static int rcar_rst_set_gen3_rproc_boot_addr(u64 boot_addr)
{ … }

struct rst_config { … };

static const struct rst_config rcar_rst_gen1 __initconst = …;

static const struct rst_config rcar_rst_gen2 __initconst = …;

static const struct rst_config rcar_rst_gen3 __initconst = …;

/* V3U firmware doesn't enable WDT reset and there won't be updates anymore */
static const struct rst_config rcar_rst_v3u __initconst = …;

static const struct rst_config rcar_rst_gen4 __initconst = …;

static const struct of_device_id rcar_rst_matches[] __initconst = …;

static int __init rcar_rst_init(void)
{ … }

int __init rcar_rst_read_mode_pins(u32 *mode)
{ … }

int rcar_rst_set_rproc_boot_addr(u64 boot_addr)
{ … }
EXPORT_SYMBOL_GPL(…);