/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016 Glider bvba */ #ifndef __DT_BINDINGS_POWER_R8A7795_SYSC_H__ #define __DT_BINDINGS_POWER_R8A7795_SYSC_H__ /* * These power domain indices match the numbers of the interrupt bits * representing the power areas in the various Interrupt Registers * (e.g. SYSCISR, Interrupt Status Register) */ #define R8A7795_PD_CA57_CPU0 … #define R8A7795_PD_CA57_CPU1 … #define R8A7795_PD_CA57_CPU2 … #define R8A7795_PD_CA57_CPU3 … #define R8A7795_PD_CA53_CPU0 … #define R8A7795_PD_CA53_CPU1 … #define R8A7795_PD_CA53_CPU2 … #define R8A7795_PD_CA53_CPU3 … #define R8A7795_PD_A3VP … #define R8A7795_PD_CA57_SCU … #define R8A7795_PD_CR7 … #define R8A7795_PD_A3VC … #define R8A7795_PD_3DG_A … #define R8A7795_PD_3DG_B … #define R8A7795_PD_3DG_C … #define R8A7795_PD_3DG_D … #define R8A7795_PD_CA53_SCU … #define R8A7795_PD_3DG_E … #define R8A7795_PD_A3IR … #define R8A7795_PD_A2VC1 … /* Always-on power area */ #define R8A7795_PD_ALWAYS_ON … #endif /* __DT_BINDINGS_POWER_R8A7795_SYSC_H__ */
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