/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ /* * Copyright (c) 2022 MediaTek Inc. * Author: Chun-Jie Chen <[email protected]> */ #ifndef _DT_BINDINGS_POWER_MT8186_POWER_H #define _DT_BINDINGS_POWER_MT8186_POWER_H #define MT8186_POWER_DOMAIN_MFG0 … #define MT8186_POWER_DOMAIN_MFG1 … #define MT8186_POWER_DOMAIN_MFG2 … #define MT8186_POWER_DOMAIN_MFG3 … #define MT8186_POWER_DOMAIN_SSUSB … #define MT8186_POWER_DOMAIN_SSUSB_P1 … #define MT8186_POWER_DOMAIN_DIS … #define MT8186_POWER_DOMAIN_IMG … #define MT8186_POWER_DOMAIN_IMG2 … #define MT8186_POWER_DOMAIN_IPE … #define MT8186_POWER_DOMAIN_CAM … #define MT8186_POWER_DOMAIN_CAM_RAWA … #define MT8186_POWER_DOMAIN_CAM_RAWB … #define MT8186_POWER_DOMAIN_VENC … #define MT8186_POWER_DOMAIN_VDEC … #define MT8186_POWER_DOMAIN_WPE … #define MT8186_POWER_DOMAIN_CONN_ON … #define MT8186_POWER_DOMAIN_CSIRX_TOP … #define MT8186_POWER_DOMAIN_ADSP_AO … #define MT8186_POWER_DOMAIN_ADSP_INFRA … #define MT8186_POWER_DOMAIN_ADSP_TOP … #endif /* _DT_BINDINGS_POWER_MT8186_POWER_H */
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