/* * AXP20x regulators driver. * * Copyright (C) 2013 Carlo Caione <[email protected]> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file "COPYING" in the main directory of this * archive for more details. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include <linux/bitops.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/init.h> #include <linux/mfd/axp20x.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/regulator/driver.h> #include <linux/regulator/machine.h> #include <linux/regulator/of_regulator.h> #define AXP20X_GPIO0_FUNC_MASK … #define AXP20X_GPIO1_FUNC_MASK … #define AXP20X_IO_ENABLED … #define AXP20X_IO_DISABLED … #define AXP20X_WORKMODE_DCDC2_MASK … #define AXP20X_WORKMODE_DCDC3_MASK … #define AXP20X_FREQ_DCDC_MASK … #define AXP20X_VBUS_IPSOUT_MGMT_MASK … #define AXP20X_DCDC2_V_OUT_MASK … #define AXP20X_DCDC3_V_OUT_MASK … #define AXP20X_LDO2_V_OUT_MASK … #define AXP20X_LDO3_V_OUT_MASK … #define AXP20X_LDO4_V_OUT_MASK … #define AXP20X_LDO5_V_OUT_MASK … #define AXP20X_PWR_OUT_EXTEN_MASK … #define AXP20X_PWR_OUT_DCDC3_MASK … #define AXP20X_PWR_OUT_LDO2_MASK … #define AXP20X_PWR_OUT_LDO4_MASK … #define AXP20X_PWR_OUT_DCDC2_MASK … #define AXP20X_PWR_OUT_LDO3_MASK … #define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE_MASK … #define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE(x) … #define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE_MASK … #define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE(x) … #define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN_MASK … #define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN … #define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN_MASK … #define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN … #define AXP20X_LDO4_V_OUT_1250mV_START … #define AXP20X_LDO4_V_OUT_1250mV_STEPS … #define AXP20X_LDO4_V_OUT_1250mV_END … #define AXP20X_LDO4_V_OUT_1300mV_START … #define AXP20X_LDO4_V_OUT_1300mV_STEPS … #define AXP20X_LDO4_V_OUT_1300mV_END … #define AXP20X_LDO4_V_OUT_2500mV_START … #define AXP20X_LDO4_V_OUT_2500mV_STEPS … #define AXP20X_LDO4_V_OUT_2500mV_END … #define AXP20X_LDO4_V_OUT_2700mV_START … #define AXP20X_LDO4_V_OUT_2700mV_STEPS … #define AXP20X_LDO4_V_OUT_2700mV_END … #define AXP20X_LDO4_V_OUT_3000mV_START … #define AXP20X_LDO4_V_OUT_3000mV_STEPS … #define AXP20X_LDO4_V_OUT_3000mV_END … #define AXP20X_LDO4_V_OUT_NUM_VOLTAGES … #define AXP22X_IO_ENABLED … #define AXP22X_IO_DISABLED … #define AXP22X_WORKMODE_DCDCX_MASK(x) … #define AXP22X_MISC_N_VBUSEN_FUNC … #define AXP22X_DCDC1_V_OUT_MASK … #define AXP22X_DCDC2_V_OUT_MASK … #define AXP22X_DCDC3_V_OUT_MASK … #define AXP22X_DCDC4_V_OUT_MASK … #define AXP22X_DCDC5_V_OUT_MASK … #define AXP22X_DC5LDO_V_OUT_MASK … #define AXP22X_ALDO1_V_OUT_MASK … #define AXP22X_ALDO2_V_OUT_MASK … #define AXP22X_ALDO3_V_OUT_MASK … #define AXP22X_DLDO1_V_OUT_MASK … #define AXP22X_DLDO2_V_OUT_MASK … #define AXP22X_DLDO3_V_OUT_MASK … #define AXP22X_DLDO4_V_OUT_MASK … #define AXP22X_ELDO1_V_OUT_MASK … #define AXP22X_ELDO2_V_OUT_MASK … #define AXP22X_ELDO3_V_OUT_MASK … #define AXP22X_LDO_IO0_V_OUT_MASK … #define AXP22X_LDO_IO1_V_OUT_MASK … #define AXP22X_PWR_OUT_DC5LDO_MASK … #define AXP22X_PWR_OUT_DCDC1_MASK … #define AXP22X_PWR_OUT_DCDC2_MASK … #define AXP22X_PWR_OUT_DCDC3_MASK … #define AXP22X_PWR_OUT_DCDC4_MASK … #define AXP22X_PWR_OUT_DCDC5_MASK … #define AXP22X_PWR_OUT_ALDO1_MASK … #define AXP22X_PWR_OUT_ALDO2_MASK … #define AXP22X_PWR_OUT_SW_MASK … #define AXP22X_PWR_OUT_DC1SW_MASK … #define AXP22X_PWR_OUT_ELDO1_MASK … #define AXP22X_PWR_OUT_ELDO2_MASK … #define AXP22X_PWR_OUT_ELDO3_MASK … #define AXP22X_PWR_OUT_DLDO1_MASK … #define AXP22X_PWR_OUT_DLDO2_MASK … #define AXP22X_PWR_OUT_DLDO3_MASK … #define AXP22X_PWR_OUT_DLDO4_MASK … #define AXP22X_PWR_OUT_ALDO3_MASK … #define AXP313A_DCDC1_NUM_VOLTAGES … #define AXP313A_DCDC23_NUM_VOLTAGES … #define AXP313A_DCDC_V_OUT_MASK … #define AXP313A_LDO_V_OUT_MASK … #define AXP717_DCDC1_NUM_VOLTAGES … #define AXP717_DCDC2_NUM_VOLTAGES … #define AXP717_DCDC3_NUM_VOLTAGES … #define AXP717_DCDC_V_OUT_MASK … #define AXP717_LDO_V_OUT_MASK … #define AXP803_PWR_OUT_DCDC1_MASK … #define AXP803_PWR_OUT_DCDC2_MASK … #define AXP803_PWR_OUT_DCDC3_MASK … #define AXP803_PWR_OUT_DCDC4_MASK … #define AXP803_PWR_OUT_DCDC5_MASK … #define AXP803_PWR_OUT_DCDC6_MASK … #define AXP803_PWR_OUT_FLDO1_MASK … #define AXP803_PWR_OUT_FLDO2_MASK … #define AXP803_DCDC1_V_OUT_MASK … #define AXP803_DCDC2_V_OUT_MASK … #define AXP803_DCDC3_V_OUT_MASK … #define AXP803_DCDC4_V_OUT_MASK … #define AXP803_DCDC5_V_OUT_MASK … #define AXP803_DCDC6_V_OUT_MASK … #define AXP803_FLDO1_V_OUT_MASK … #define AXP803_FLDO2_V_OUT_MASK … #define AXP803_DCDC23_POLYPHASE_DUAL … #define AXP803_DCDC56_POLYPHASE_DUAL … #define AXP803_DCDC234_500mV_START … #define AXP803_DCDC234_500mV_STEPS … #define AXP803_DCDC234_500mV_END … #define AXP803_DCDC234_1220mV_START … #define AXP803_DCDC234_1220mV_STEPS … #define AXP803_DCDC234_1220mV_END … #define AXP803_DCDC234_NUM_VOLTAGES … #define AXP803_DCDC5_800mV_START … #define AXP803_DCDC5_800mV_STEPS … #define AXP803_DCDC5_800mV_END … #define AXP803_DCDC5_1140mV_START … #define AXP803_DCDC5_1140mV_STEPS … #define AXP803_DCDC5_1140mV_END … #define AXP803_DCDC5_NUM_VOLTAGES … #define AXP803_DCDC6_600mV_START … #define AXP803_DCDC6_600mV_STEPS … #define AXP803_DCDC6_600mV_END … #define AXP803_DCDC6_1120mV_START … #define AXP803_DCDC6_1120mV_STEPS … #define AXP803_DCDC6_1120mV_END … #define AXP803_DCDC6_NUM_VOLTAGES … #define AXP803_DLDO2_700mV_START … #define AXP803_DLDO2_700mV_STEPS … #define AXP803_DLDO2_700mV_END … #define AXP803_DLDO2_3400mV_START … #define AXP803_DLDO2_3400mV_STEPS … #define AXP803_DLDO2_3400mV_END … #define AXP803_DLDO2_NUM_VOLTAGES … #define AXP806_DCDCA_V_CTRL_MASK … #define AXP806_DCDCB_V_CTRL_MASK … #define AXP806_DCDCC_V_CTRL_MASK … #define AXP806_DCDCD_V_CTRL_MASK … #define AXP806_DCDCE_V_CTRL_MASK … #define AXP806_ALDO1_V_CTRL_MASK … #define AXP806_ALDO2_V_CTRL_MASK … #define AXP806_ALDO3_V_CTRL_MASK … #define AXP806_BLDO1_V_CTRL_MASK … #define AXP806_BLDO2_V_CTRL_MASK … #define AXP806_BLDO3_V_CTRL_MASK … #define AXP806_BLDO4_V_CTRL_MASK … #define AXP806_CLDO1_V_CTRL_MASK … #define AXP806_CLDO2_V_CTRL_MASK … #define AXP806_CLDO3_V_CTRL_MASK … #define AXP806_PWR_OUT_DCDCA_MASK … #define AXP806_PWR_OUT_DCDCB_MASK … #define AXP806_PWR_OUT_DCDCC_MASK … #define AXP806_PWR_OUT_DCDCD_MASK … #define AXP806_PWR_OUT_DCDCE_MASK … #define AXP806_PWR_OUT_ALDO1_MASK … #define AXP806_PWR_OUT_ALDO2_MASK … #define AXP806_PWR_OUT_ALDO3_MASK … #define AXP806_PWR_OUT_BLDO1_MASK … #define AXP806_PWR_OUT_BLDO2_MASK … #define AXP806_PWR_OUT_BLDO3_MASK … #define AXP806_PWR_OUT_BLDO4_MASK … #define AXP806_PWR_OUT_CLDO1_MASK … #define AXP806_PWR_OUT_CLDO2_MASK … #define AXP806_PWR_OUT_CLDO3_MASK … #define AXP806_PWR_OUT_SW_MASK … #define AXP806_DCDCAB_POLYPHASE_DUAL … #define AXP806_DCDCABC_POLYPHASE_TRI … #define AXP806_DCDCABC_POLYPHASE_MASK … #define AXP806_DCDCDE_POLYPHASE_DUAL … #define AXP806_DCDCA_600mV_START … #define AXP806_DCDCA_600mV_STEPS … #define AXP806_DCDCA_600mV_END … #define AXP806_DCDCA_1120mV_START … #define AXP806_DCDCA_1120mV_STEPS … #define AXP806_DCDCA_1120mV_END … #define AXP806_DCDCA_NUM_VOLTAGES … #define AXP806_DCDCD_600mV_START … #define AXP806_DCDCD_600mV_STEPS … #define AXP806_DCDCD_600mV_END … #define AXP806_DCDCD_1600mV_START … #define AXP806_DCDCD_1600mV_STEPS … #define AXP806_DCDCD_1600mV_END … #define AXP806_DCDCD_NUM_VOLTAGES … #define AXP809_DCDC4_600mV_START … #define AXP809_DCDC4_600mV_STEPS … #define AXP809_DCDC4_600mV_END … #define AXP809_DCDC4_1800mV_START … #define AXP809_DCDC4_1800mV_STEPS … #define AXP809_DCDC4_1800mV_END … #define AXP809_DCDC4_NUM_VOLTAGES … #define AXP813_DCDC7_V_OUT_MASK … #define AXP813_PWR_OUT_DCDC7_MASK … #define AXP15060_DCDC1_V_CTRL_MASK … #define AXP15060_DCDC2_V_CTRL_MASK … #define AXP15060_DCDC3_V_CTRL_MASK … #define AXP15060_DCDC4_V_CTRL_MASK … #define AXP15060_DCDC5_V_CTRL_MASK … #define AXP15060_DCDC6_V_CTRL_MASK … #define AXP15060_ALDO1_V_CTRL_MASK … #define AXP15060_ALDO2_V_CTRL_MASK … #define AXP15060_ALDO3_V_CTRL_MASK … #define AXP15060_ALDO4_V_CTRL_MASK … #define AXP15060_ALDO5_V_CTRL_MASK … #define AXP15060_BLDO1_V_CTRL_MASK … #define AXP15060_BLDO2_V_CTRL_MASK … #define AXP15060_BLDO3_V_CTRL_MASK … #define AXP15060_BLDO4_V_CTRL_MASK … #define AXP15060_BLDO5_V_CTRL_MASK … #define AXP15060_CLDO1_V_CTRL_MASK … #define AXP15060_CLDO2_V_CTRL_MASK … #define AXP15060_CLDO3_V_CTRL_MASK … #define AXP15060_CLDO4_V_CTRL_MASK … #define AXP15060_CPUSLDO_V_CTRL_MASK … #define AXP15060_PWR_OUT_DCDC1_MASK … #define AXP15060_PWR_OUT_DCDC2_MASK … #define AXP15060_PWR_OUT_DCDC3_MASK … #define AXP15060_PWR_OUT_DCDC4_MASK … #define AXP15060_PWR_OUT_DCDC5_MASK … #define AXP15060_PWR_OUT_DCDC6_MASK … #define AXP15060_PWR_OUT_ALDO1_MASK … #define AXP15060_PWR_OUT_ALDO2_MASK … #define AXP15060_PWR_OUT_ALDO3_MASK … #define AXP15060_PWR_OUT_ALDO4_MASK … #define AXP15060_PWR_OUT_ALDO5_MASK … #define AXP15060_PWR_OUT_BLDO1_MASK … #define AXP15060_PWR_OUT_BLDO2_MASK … #define AXP15060_PWR_OUT_BLDO3_MASK … #define AXP15060_PWR_OUT_BLDO4_MASK … #define AXP15060_PWR_OUT_BLDO5_MASK … #define AXP15060_PWR_OUT_CLDO1_MASK … #define AXP15060_PWR_OUT_CLDO2_MASK … #define AXP15060_PWR_OUT_CLDO3_MASK … #define AXP15060_PWR_OUT_CLDO4_MASK … #define AXP15060_PWR_OUT_CPUSLDO_MASK … #define AXP15060_PWR_OUT_SW_MASK … #define AXP15060_DCDC23_POLYPHASE_DUAL_MASK … #define AXP15060_DCDC46_POLYPHASE_DUAL_MASK … #define AXP15060_DCDC234_500mV_START … #define AXP15060_DCDC234_500mV_STEPS … #define AXP15060_DCDC234_500mV_END … #define AXP15060_DCDC234_1220mV_START … #define AXP15060_DCDC234_1220mV_STEPS … #define AXP15060_DCDC234_1220mV_END … #define AXP15060_DCDC234_NUM_VOLTAGES … #define AXP15060_DCDC5_800mV_START … #define AXP15060_DCDC5_800mV_STEPS … #define AXP15060_DCDC5_800mV_END … #define AXP15060_DCDC5_1140mV_START … #define AXP15060_DCDC5_1140mV_STEPS … #define AXP15060_DCDC5_1140mV_END … #define AXP15060_DCDC5_NUM_VOLTAGES … #define AXP_DESC_IO(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ _vmask, _ereg, _emask, _enable_val, _disable_val) … #define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ _vmask, _ereg, _emask) … #define AXP_DESC_SW(_family, _id, _match, _supply, _ereg, _emask) … #define AXP_DESC_FIXED(_family, _id, _match, _supply, _volt) … #define AXP_DESC_RANGES(_family, _id, _match, _supply, _ranges, _n_voltages, \ _vreg, _vmask, _ereg, _emask) … static const int axp209_dcdc2_ldo3_slew_rates[] = …; static int axp20x_set_ramp_delay(struct regulator_dev *rdev, int ramp) { … } static int axp20x_regulator_enable_regmap(struct regulator_dev *rdev) { struct axp20x_dev *axp20x = rdev_get_drvdata(rdev); int id = rdev_get_id(rdev); switch (axp20x->variant) { case AXP209_ID: if ((id == AXP20X_LDO3) && rdev->constraints && rdev->constraints->soft_start) { int v_out; int ret; /* * On some boards, the LDO3 can be overloaded when * turning on, causing the entire PMIC to shutdown * without warning. Turning it on at the minimal voltage * and then setting the voltage to the requested value * works reliably. */ if (regulator_is_enabled_regmap(rdev)) break; v_out = regulator_get_voltage_sel_regmap(rdev); if (v_out < 0) return v_out; if (v_out == 0) break; ret = regulator_set_voltage_sel_regmap(rdev, 0x00); /* * A small pause is needed between * setting the voltage and enabling the LDO to give the * internal state machine time to process the request. */ usleep_range(1000, 5000); ret |= regulator_enable_regmap(rdev); ret |= regulator_set_voltage_sel_regmap(rdev, v_out); return ret; } break; default: /* No quirks */ break; } return regulator_enable_regmap(rdev); }; static const struct regulator_ops axp20x_ops_fixed = …; static const struct regulator_ops axp20x_ops_range = …; static const struct regulator_ops axp20x_ops = …; static const struct regulator_ops axp20x_ops_sw = …; static const struct linear_range axp20x_ldo4_ranges[] = …; static const struct regulator_desc axp20x_regulators[] = …; static const struct regulator_desc axp22x_regulators[] = …; static const struct regulator_desc axp22x_drivevbus_regulator = …; static const struct linear_range axp313a_dcdc1_ranges[] = …; static const struct linear_range axp313a_dcdc2_ranges[] = …; /* * This is deviating from the datasheet. The values here are taken from the * BSP driver and have been confirmed by measurements. */ static const struct linear_range axp313a_dcdc3_ranges[] = …; static const struct regulator_desc axp313a_regulators[] = …; static const struct linear_range axp717_dcdc1_ranges[] = …; /* * The manual says that the last voltage is 3.4V, encoded as 0b1101011 (107), * but every other method proves that this is wrong, so it's really 106 that * programs the final 3.4V. */ static const struct linear_range axp717_dcdc2_ranges[] = …; static const struct linear_range axp717_dcdc3_ranges[] = …; static const struct regulator_desc axp717_regulators[] = …; /* DCDC ranges shared with AXP813 */ static const struct linear_range axp803_dcdc234_ranges[] = …; static const struct linear_range axp803_dcdc5_ranges[] = …; static const struct linear_range axp803_dcdc6_ranges[] = …; /* AXP806's CLDO2 and AXP809's DLDO1 share the same range */ static const struct linear_range axp803_dldo2_ranges[] = …; static const struct regulator_desc axp803_regulators[] = …; static const struct linear_range axp806_dcdca_ranges[] = …; static const struct linear_range axp806_dcdcd_ranges[] = …; static const struct regulator_desc axp806_regulators[] = …; static const struct linear_range axp809_dcdc4_ranges[] = …; static const struct regulator_desc axp809_regulators[] = …; static const struct regulator_desc axp813_regulators[] = …; static const struct linear_range axp15060_dcdc234_ranges[] = …; static const struct linear_range axp15060_dcdc5_ranges[] = …; static const struct regulator_desc axp15060_regulators[] = …; static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq) { … } static int axp20x_regulator_parse_dt(struct platform_device *pdev) { … } static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode) { … } /* * This function checks whether a regulator is part of a poly-phase * output setup based on the registers settings. Returns true if it is. */ static bool axp20x_is_polyphase_slave(struct axp20x_dev *axp20x, int id) { … } static int axp20x_regulator_probe(struct platform_device *pdev) { … } static struct platform_driver axp20x_regulator_driver = …; module_platform_driver(…) …; MODULE_LICENSE(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_ALIAS(…) …;
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