/* SPDX-License-Identifier: GPL-2.0+ */ /* * Common variables for the Maxim MAX77843 driver * * Copyright (C) 2015 Samsung Electronics * Author: Jaewon Kim <[email protected]> * Author: Beomho Seo <[email protected]> */ #ifndef __MAX77843_PRIVATE_H_ #define __MAX77843_PRIVATE_H_ #include <linux/i2c.h> #include <linux/regmap.h> #define I2C_ADDR_TOPSYS … #define I2C_ADDR_CHG … #define I2C_ADDR_FG … #define I2C_ADDR_MUIC … /* Topsys, Haptic and LED registers */ enum max77843_sys_reg { … }; enum max77843_haptic_reg { … }; enum max77843_led_reg { … }; /* Charger registers */ enum max77843_charger_reg { … }; /* Fuel gauge registers */ enum max77843_fuelgauge { … }; /* MUIC registers */ enum max77843_muic_reg { … }; enum max77843_irq { … }; enum max77843_irq_muic { … }; /* MAX77843 interrupts */ #define MAX77843_SYS_IRQ_SYSUVLO_INT … #define MAX77843_SYS_IRQ_SYSOVLO_INT … #define MAX77843_SYS_IRQ_TSHDN_INT … #define MAX77843_SYS_IRQ_TM_INT … /* MAX77843 MAINCTRL1 register */ #define MAINCTRL1_BIASEN_SHIFT … #define MAX77843_MAINCTRL1_BIASEN_MASK … /* MAX77843 MCONFIG register */ #define MCONFIG_MODE_SHIFT … #define MCONFIG_MEN_SHIFT … #define MCONFIG_PDIV_SHIFT … #define MAX77843_MCONFIG_MODE_MASK … #define MAX77843_MCONFIG_MEN_MASK … #define MAX77843_MCONFIG_PDIV_MASK … /* Max77843 charger interrupts */ #define MAX77843_CHG_BYP_I … #define MAX77843_CHG_BATP_I … #define MAX77843_CHG_BAT_I … #define MAX77843_CHG_CHG_I … #define MAX77843_CHG_WCIN_I … #define MAX77843_CHG_CHGIN_I … #define MAX77843_CHG_AICL_I … /* MAX77843 CHG_INT_OK register */ #define MAX77843_CHG_BYP_OK … #define MAX77843_CHG_BATP_OK … #define MAX77843_CHG_BAT_OK … #define MAX77843_CHG_CHG_OK … #define MAX77843_CHG_WCIN_OK … #define MAX77843_CHG_CHGIN_OK … #define MAX77843_CHG_AICL_OK … /* MAX77843 CHG_DETAILS_00 register */ #define MAX77843_CHG_BAT_DTLS … /* MAX77843 CHG_DETAILS_01 register */ #define MAX77843_CHG_DTLS_MASK … #define MAX77843_CHG_PQ_MODE … #define MAX77843_CHG_CC_MODE … #define MAX77843_CHG_CV_MODE … #define MAX77843_CHG_TO_MODE … #define MAX77843_CHG_DO_MODE … #define MAX77843_CHG_HT_MODE … #define MAX77843_CHG_TF_MODE … #define MAX77843_CHG_TS_MODE … #define MAX77843_CHG_OFF_MODE … #define MAX77843_CHG_BAT_DTLS_MASK … #define MAX77843_CHG_NO_BAT … #define MAX77843_CHG_LOW_VOLT_BAT … #define MAX77843_CHG_LONG_BAT_TIME … #define MAX77843_CHG_OK_BAT … #define MAX77843_CHG_OK_LOW_VOLT_BAT … #define MAX77843_CHG_OVER_VOLT_BAT … #define MAX77843_CHG_OVER_CURRENT_BAT … /* MAX77843 CHG_CNFG_00 register */ #define MAX77843_CHG_MODE_MASK … #define MAX77843_CHG_DISABLE … #define MAX77843_CHG_ENABLE … #define MAX77843_CHG_MASK … #define MAX77843_CHG_OTG_MASK … #define MAX77843_CHG_BUCK_MASK … #define MAX77843_CHG_BOOST_MASK … /* MAX77843 CHG_CNFG_01 register */ #define MAX77843_CHG_RESTART_THRESHOLD_100 … #define MAX77843_CHG_RESTART_THRESHOLD_150 … #define MAX77843_CHG_RESTART_THRESHOLD_200 … #define MAX77843_CHG_RESTART_THRESHOLD_DISABLE … /* MAX77843 CHG_CNFG_02 register */ #define MAX77843_CHG_FAST_CHG_CURRENT_MIN … #define MAX77843_CHG_FAST_CHG_CURRENT_MAX … #define MAX77843_CHG_FAST_CHG_CURRENT_STEP … #define MAX77843_CHG_FAST_CHG_CURRENT_MASK … #define MAX77843_CHG_OTG_ILIMIT_500 … #define MAX77843_CHG_OTG_ILIMIT_900 … #define MAX77843_CHG_OTG_ILIMIT_1200 … #define MAX77843_CHG_OTG_ILIMIT_1500 … #define MAX77843_CHG_OTG_ILIMIT_MASK … /* MAX77843 CHG_CNFG_03 register */ #define MAX77843_CHG_TOP_OFF_CURRENT_MIN … #define MAX77843_CHG_TOP_OFF_CURRENT_MAX … #define MAX77843_CHG_TOP_OFF_CURRENT_STEP … #define MAX77843_CHG_TOP_OFF_CURRENT_MASK … /* MAX77843 CHG_CNFG_06 register */ #define MAX77843_CHG_WRITE_CAP_BLOCK … #define MAX77843_CHG_WRITE_CAP_UNBLOCK … /* MAX77843_CHG_CNFG_09_register */ #define MAX77843_CHG_INPUT_CURRENT_LIMIT_MIN … #define MAX77843_CHG_INPUT_CURRENT_LIMIT_MAX … #define MAX77843_CHG_INPUT_CURRENT_LIMIT_REF … #define MAX77843_CHG_INPUT_CURRENT_LIMIT_STEP … #define MAX77843_MUIC_ADC … #define MAX77843_MUIC_ADCERROR … #define MAX77843_MUIC_ADC1K … #define MAX77843_MUIC_CHGTYP … #define MAX77843_MUIC_CHGDETRUN … #define MAX77843_MUIC_DCDTMR … #define MAX77843_MUIC_DXOVP … #define MAX77843_MUIC_VBVOLT … #define MAX77843_MUIC_VBADC … #define MAX77843_MUIC_VDNMON … #define MAX77843_MUIC_DNRES … #define MAX77843_MUIC_MPNACK … #define MAX77843_MUIC_MRXBUFOW … #define MAX77843_MUIC_MRXTRF … #define MAX77843_MUIC_MRXPERR … #define MAX77843_MUIC_MRXRDY … /* MAX77843 INTSRCMASK register */ #define MAX77843_INTSRCMASK_CHGR … #define MAX77843_INTSRCMASK_SYS … #define MAX77843_INTSRCMASK_FG … #define MAX77843_INTSRCMASK_MUIC … #define MAX77843_INTSRCMASK_CHGR_MASK … #define MAX77843_INTSRCMASK_SYS_MASK … #define MAX77843_INTSRCMASK_FG_MASK … #define MAX77843_INTSRCMASK_MUIC_MASK … #define MAX77843_INTSRC_MASK_MASK … /* MAX77843 STATUS register*/ #define MAX77843_MUIC_STATUS1_ADC_SHIFT … #define MAX77843_MUIC_STATUS1_ADCERROR_SHIFT … #define MAX77843_MUIC_STATUS1_ADC1K_SHIFT … #define MAX77843_MUIC_STATUS2_CHGTYP_SHIFT … #define MAX77843_MUIC_STATUS2_CHGDETRUN_SHIFT … #define MAX77843_MUIC_STATUS2_DCDTMR_SHIFT … #define MAX77843_MUIC_STATUS2_DXOVP_SHIFT … #define MAX77843_MUIC_STATUS2_VBVOLT_SHIFT … #define MAX77843_MUIC_STATUS3_VBADC_SHIFT … #define MAX77843_MUIC_STATUS3_VDNMON_SHIFT … #define MAX77843_MUIC_STATUS3_DNRES_SHIFT … #define MAX77843_MUIC_STATUS3_MPNACK_SHIFT … #define MAX77843_MUIC_STATUS1_ADC_MASK … #define MAX77843_MUIC_STATUS1_ADCERROR_MASK … #define MAX77843_MUIC_STATUS1_ADC1K_MASK … #define MAX77843_MUIC_STATUS2_CHGTYP_MASK … #define MAX77843_MUIC_STATUS2_CHGDETRUN_MASK … #define MAX77843_MUIC_STATUS2_DCDTMR_MASK … #define MAX77843_MUIC_STATUS2_DXOVP_MASK … #define MAX77843_MUIC_STATUS2_VBVOLT_MASK … #define MAX77843_MUIC_STATUS3_VBADC_MASK … #define MAX77843_MUIC_STATUS3_VDNMON_MASK … #define MAX77843_MUIC_STATUS3_DNRES_MASK … #define MAX77843_MUIC_STATUS3_MPNACK_MASK … /* MAX77843 CONTROL register */ #define MAX77843_MUIC_CONTROL1_COMP1SW_SHIFT … #define MAX77843_MUIC_CONTROL1_COMP2SW_SHIFT … #define MAX77843_MUIC_CONTROL1_NOBCCOMP_SHIFT … #define MAX77843_MUIC_CONTROL1_IDBEN_SHIFT … #define MAX77843_MUIC_CONTROL2_LOWPWR_SHIFT … #define MAX77843_MUIC_CONTROL2_ADCEN_SHIFT … #define MAX77843_MUIC_CONTROL2_CPEN_SHIFT … #define MAX77843_MUIC_CONTROL2_ACC_DET_SHIFT … #define MAX77843_MUIC_CONTROL2_USBCPINT_SHIFT … #define MAX77843_MUIC_CONTROL2_RCPS_SHIFT … #define MAX77843_MUIC_CONTROL3_JIGSET_SHIFT … #define MAX77843_MUIC_CONTROL4_ADCDBSET_SHIFT … #define MAX77843_MUIC_CONTROL4_USBAUTO_SHIFT … #define MAX77843_MUIC_CONTROL4_FCTAUTO_SHIFT … #define MAX77843_MUIC_CONTROL4_ADCMODE_SHIFT … #define MAX77843_MUIC_CONTROL1_COMP1SW_MASK … #define MAX77843_MUIC_CONTROL1_COMP2SW_MASK … #define MAX77843_MUIC_CONTROL1_IDBEN_MASK … #define MAX77843_MUIC_CONTROL1_NOBCCOMP_MASK … #define MAX77843_MUIC_CONTROL2_LOWPWR_MASK … #define MAX77843_MUIC_CONTROL2_ADCEN_MASK … #define MAX77843_MUIC_CONTROL2_CPEN_MASK … #define MAX77843_MUIC_CONTROL2_ACC_DET_MASK … #define MAX77843_MUIC_CONTROL2_USBCPINT_MASK … #define MAX77843_MUIC_CONTROL2_RCPS_MASK … #define MAX77843_MUIC_CONTROL3_JIGSET_MASK … #define MAX77843_MUIC_CONTROL4_ADCDBSET_MASK … #define MAX77843_MUIC_CONTROL4_USBAUTO_MASK … #define MAX77843_MUIC_CONTROL4_FCTAUTO_MASK … #define MAX77843_MUIC_CONTROL4_ADCMODE_MASK … /* MAX77843 switch port */ #define COM_OPEN … #define COM_USB … #define COM_AUDIO … #define COM_UART … #define COM_AUX_USB … #define COM_AUX_UART … #define MAX77843_MUIC_CONTROL1_COM_SW … #define MAX77843_MUIC_CONTROL1_SW_OPEN … #define MAX77843_MUIC_CONTROL1_SW_USB … #define MAX77843_MUIC_CONTROL1_SW_AUDIO … #define MAX77843_MUIC_CONTROL1_SW_UART … #define MAX77843_MUIC_CONTROL1_SW_AUX_USB … #define MAX77843_MUIC_CONTROL1_SW_AUX_UART … #define MAX77843_DISABLE … #define MAX77843_ENABLE … #define CONTROL4_AUTO_DISABLE … #define CONTROL4_AUTO_ENABLE … /* MAX77843 SAFEOUT LDO Control register */ #define SAFEOUTCTRL_SAFEOUT1_SHIFT … #define SAFEOUTCTRL_SAFEOUT2_SHIFT … #define SAFEOUTCTRL_ENSAFEOUT1_SHIFT … #define SAFEOUTCTRL_ENSAFEOUT2_SHIFT … #define MAX77843_REG_SAFEOUTCTRL_ENSAFEOUT1 … #define MAX77843_REG_SAFEOUTCTRL_ENSAFEOUT2 … #define MAX77843_REG_SAFEOUTCTRL_SAFEOUT1_MASK … #define MAX77843_REG_SAFEOUTCTRL_SAFEOUT2_MASK … #endif /* __MAX77843_H__ */
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