linux/drivers/clk/qcom/gpucc-x1e80100.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <linux/clk-provider.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>

#include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
#include <dt-bindings/reset/qcom,x1e80100-gpucc.h>

#include "clk-alpha-pll.h"
#include "clk-branch.h"
#include "clk-rcg.h"
#include "clk-regmap.h"
#include "clk-regmap-divider.h"
#include "clk-regmap-mux.h"
#include "gdsc.h"
#include "reset.h"

enum { … };

enum { … };

static const struct pll_vco lucid_ole_vco[] = …;

static const struct pll_vco zonda_ole_vco[] = …;

static const struct alpha_pll_config gpu_cc_pll0_config = …;

static struct clk_alpha_pll gpu_cc_pll0 = …;

static const struct alpha_pll_config gpu_cc_pll1_config = …;

static struct clk_alpha_pll gpu_cc_pll1 = …;

static const struct parent_map gpu_cc_parent_map_0[] = …;

static const struct clk_parent_data gpu_cc_parent_data_0[] = …;

static const struct parent_map gpu_cc_parent_map_1[] = …;

static const struct clk_parent_data gpu_cc_parent_data_1[] = …;

static const struct parent_map gpu_cc_parent_map_2[] = …;

static const struct clk_parent_data gpu_cc_parent_data_2[] = …;

static const struct parent_map gpu_cc_parent_map_3[] = …;

static const struct clk_parent_data gpu_cc_parent_data_3[] = …;

static const struct freq_tbl ftbl_gpu_cc_ff_clk_src[] = …;

static struct clk_rcg2 gpu_cc_ff_clk_src = …;

static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src[] = …;

static struct clk_rcg2 gpu_cc_gmu_clk_src = …;

static struct clk_rcg2 gpu_cc_hub_clk_src = …;

static struct clk_rcg2 gpu_cc_xo_clk_src = …;

static struct clk_regmap_div gpu_cc_demet_div_clk_src = …;

static struct clk_regmap_div gpu_cc_xo_div_clk_src = …;

static struct clk_branch gpu_cc_ahb_clk = …;

static struct clk_branch gpu_cc_crc_ahb_clk = …;

static struct clk_branch gpu_cc_cx_ff_clk = …;

static struct clk_branch gpu_cc_cx_gmu_clk = …;

static struct clk_branch gpu_cc_cxo_aon_clk = …;

static struct clk_branch gpu_cc_cxo_clk = …;

static struct clk_branch gpu_cc_demet_clk = …;

static struct clk_branch gpu_cc_freq_measure_clk = …;

static struct clk_branch gpu_cc_hlos1_vote_gpu_smmu_clk = …;

static struct clk_branch gpu_cc_gx_gmu_clk = …;

static struct clk_branch gpu_cc_gx_vsense_clk = …;

static struct clk_branch gpu_cc_hub_aon_clk = …;

static struct clk_branch gpu_cc_hub_cx_int_clk = …;

static struct clk_branch gpu_cc_memnoc_gfx_clk = …;

static struct clk_branch gpu_cc_mnd1x_0_gfx3d_clk = …;

static struct clk_branch gpu_cc_mnd1x_1_gfx3d_clk = …;

static struct clk_branch gpu_cc_sleep_clk = …;

static struct gdsc gpu_cx_gdsc = …;

static struct gdsc gpu_gx_gdsc = …;

static struct clk_regmap *gpu_cc_x1e80100_clocks[] = …;

static const struct qcom_reset_map gpu_cc_x1e80100_resets[] = …;

static struct gdsc *gpu_cc_x1e80100_gdscs[] = …;

static const struct regmap_config gpu_cc_x1e80100_regmap_config = …;

static const struct qcom_cc_desc gpu_cc_x1e80100_desc = …;

static const struct of_device_id gpu_cc_x1e80100_match_table[] = …;
MODULE_DEVICE_TABLE(of, gpu_cc_x1e80100_match_table);

static int gpu_cc_x1e80100_probe(struct platform_device *pdev)
{ … }

static struct platform_driver gpu_cc_x1e80100_driver = …;
module_platform_driver(…) …;

MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;