linux/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h

/*
 * Copyright 2023 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#ifndef __AMDGPU_ACA_H__
#define __AMDGPU_ACA_H__

#include <linux/list.h>

struct ras_err_data;
struct ras_query_context;

#define ACA_MAX_REGS_COUNT

#define ACA_REG_FIELD(x, h, l)
#define ACA_REG__STATUS__VAL(x)
#define ACA_REG__STATUS__OVERFLOW(x)
#define ACA_REG__STATUS__UC(x)
#define ACA_REG__STATUS__EN(x)
#define ACA_REG__STATUS__MISCV(x)
#define ACA_REG__STATUS__ADDRV(x)
#define ACA_REG__STATUS__PCC(x)
#define ACA_REG__STATUS__ERRCOREIDVAL(x)
#define ACA_REG__STATUS__TCC(x)
#define ACA_REG__STATUS__SYNDV(x)
#define ACA_REG__STATUS__CECC(x)
#define ACA_REG__STATUS__UECC(x)
#define ACA_REG__STATUS__DEFERRED(x)
#define ACA_REG__STATUS__POISON(x)
#define ACA_REG__STATUS__SCRUB(x)
#define ACA_REG__STATUS__ERRCOREID(x)
#define ACA_REG__STATUS__ADDRLSB(x)
#define ACA_REG__STATUS__ERRORCODEEXT(x)
#define ACA_REG__STATUS__ERRORCODE(x)

#define ACA_REG__IPID__MCATYPE(x)
#define ACA_REG__IPID__INSTANCEIDHI(x)
#define ACA_REG__IPID__HARDWAREID(x)
#define ACA_REG__IPID__INSTANCEIDLO(x)

#define ACA_REG__MISC0__VALID(x)
#define ACA_REG__MISC0__OVRFLW(x)
#define ACA_REG__MISC0__ERRCNT(x)

#define ACA_REG__SYND__ERRORINFORMATION(x)

/* NOTE: The following codes refers to the smu header file */
#define ACA_EXTERROR_CODE_CE
#define ACA_EXTERROR_CODE_FAULT

#define ACA_ERROR_UE_MASK
#define ACA_ERROR_CE_MASK
#define ACA_ERROR_DEFERRED_MASK

enum aca_reg_idx {};

enum aca_hwip_type {};

enum aca_error_type {};

enum aca_smu_type {};

struct aca_bank {};

struct aca_bank_node {};

struct aca_bank_info {};

struct aca_bank_error {};

struct aca_error {};

struct aca_handle_manager {};

struct aca_error_cache {};

struct aca_handle {};

struct aca_bank_ops {};

struct aca_smu_funcs {};

struct amdgpu_aca {};

struct aca_info {};

int amdgpu_aca_init(struct amdgpu_device *adev);
void amdgpu_aca_fini(struct amdgpu_device *adev);
int amdgpu_aca_reset(struct amdgpu_device *adev);
void amdgpu_aca_set_smu_funcs(struct amdgpu_device *adev, const struct aca_smu_funcs *smu_funcs);
bool amdgpu_aca_is_enabled(struct amdgpu_device *adev);

int aca_bank_info_decode(struct aca_bank *bank, struct aca_bank_info *info);
int aca_bank_check_error_codes(struct amdgpu_device *adev, struct aca_bank *bank, int *err_codes, int size);

int amdgpu_aca_add_handle(struct amdgpu_device *adev, struct aca_handle *handle,
			  const char *name, const struct aca_info *aca_info, void *data);
void amdgpu_aca_remove_handle(struct aca_handle *handle);
int amdgpu_aca_get_error_data(struct amdgpu_device *adev, struct aca_handle *handle,
			      enum aca_error_type type, struct ras_err_data *err_data,
			      struct ras_query_context *qctx);
int amdgpu_aca_smu_set_debug_mode(struct amdgpu_device *adev, bool en);
void amdgpu_aca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry *root);
int aca_error_cache_log_bank_error(struct aca_handle *handle, struct aca_bank_info *info,
				   enum aca_error_type type, u64 count);
#endif