// SPDX-License-Identifier: GPL-2.0+ /* * High Speed Serial Ports on NXP LPC32xx SoC * * Authors: Kevin Wells <[email protected]> * Roland Stigge <[email protected]> * * Copyright (C) 2010 NXP Semiconductors * Copyright (C) 2012 Roland Stigge */ #include <linux/module.h> #include <linux/ioport.h> #include <linux/init.h> #include <linux/console.h> #include <linux/sysrq.h> #include <linux/tty.h> #include <linux/tty_flip.h> #include <linux/serial_core.h> #include <linux/serial.h> #include <linux/platform_device.h> #include <linux/delay.h> #include <linux/nmi.h> #include <linux/io.h> #include <linux/irq.h> #include <linux/of.h> #include <linux/sizes.h> #include <linux/soc/nxp/lpc32xx-misc.h> /* * High Speed UART register offsets */ #define LPC32XX_HSUART_FIFO(x) … #define LPC32XX_HSUART_LEVEL(x) … #define LPC32XX_HSUART_IIR(x) … #define LPC32XX_HSUART_CTRL(x) … #define LPC32XX_HSUART_RATE(x) … #define LPC32XX_HSU_BREAK_DATA … #define LPC32XX_HSU_ERROR_DATA … #define LPC32XX_HSU_RX_EMPTY … #define LPC32XX_HSU_TX_LEV(n) … #define LPC32XX_HSU_RX_LEV(n) … #define LPC32XX_HSU_TX_INT_SET … #define LPC32XX_HSU_RX_OE_INT … #define LPC32XX_HSU_BRK_INT … #define LPC32XX_HSU_FE_INT … #define LPC32XX_HSU_RX_TIMEOUT_INT … #define LPC32XX_HSU_RX_TRIG_INT … #define LPC32XX_HSU_TX_INT … #define LPC32XX_HSU_HRTS_INV … #define LPC32XX_HSU_HRTS_TRIG_8B … #define LPC32XX_HSU_HRTS_TRIG_16B … #define LPC32XX_HSU_HRTS_TRIG_32B … #define LPC32XX_HSU_HRTS_TRIG_48B … #define LPC32XX_HSU_HRTS_EN … #define LPC32XX_HSU_TMO_DISABLED … #define LPC32XX_HSU_TMO_INACT_4B … #define LPC32XX_HSU_TMO_INACT_8B … #define LPC32XX_HSU_TMO_INACT_16B … #define LPC32XX_HSU_HCTS_INV … #define LPC32XX_HSU_HCTS_EN … #define LPC32XX_HSU_OFFSET(n) … #define LPC32XX_HSU_BREAK … #define LPC32XX_HSU_ERR_INT_EN … #define LPC32XX_HSU_RX_INT_EN … #define LPC32XX_HSU_TX_INT_EN … #define LPC32XX_HSU_RX_TL1B … #define LPC32XX_HSU_RX_TL4B … #define LPC32XX_HSU_RX_TL8B … #define LPC32XX_HSU_RX_TL16B … #define LPC32XX_HSU_RX_TL32B … #define LPC32XX_HSU_RX_TL48B … #define LPC32XX_HSU_TX_TLEMPTY … #define LPC32XX_HSU_TX_TL0B … #define LPC32XX_HSU_TX_TL4B … #define LPC32XX_HSU_TX_TL8B … #define LPC32XX_HSU_TX_TL16B … #define LPC32XX_MAIN_OSC_FREQ … #define MODNAME … struct lpc32xx_hsuart_port { … }; #define FIFO_READ_LIMIT … #define MAX_PORTS … #define LPC32XX_TTY_NAME … static struct lpc32xx_hsuart_port lpc32xx_hs_ports[MAX_PORTS]; #ifdef CONFIG_SERIAL_HS_LPC32XX_CONSOLE static void wait_for_xmit_empty(struct uart_port *port) { … } static void wait_for_xmit_ready(struct uart_port *port) { … } static void lpc32xx_hsuart_console_putchar(struct uart_port *port, unsigned char ch) { … } static void lpc32xx_hsuart_console_write(struct console *co, const char *s, unsigned int count) { … } static int __init lpc32xx_hsuart_console_setup(struct console *co, char *options) { … } static struct uart_driver lpc32xx_hsuart_reg; static struct console lpc32xx_hsuart_console = …; static int __init lpc32xx_hsuart_console_init(void) { … } console_initcall(lpc32xx_hsuart_console_init); #define LPC32XX_HSUART_CONSOLE … #else #define LPC32XX_HSUART_CONSOLE … #endif static struct uart_driver lpc32xx_hs_reg = …; static int uarts_registered; static unsigned int __serial_get_clock_div(unsigned long uartclk, unsigned long rate) { … } static void __serial_uart_flush(struct uart_port *port) { … } static void __serial_lpc32xx_rx(struct uart_port *port) { … } static bool serial_lpc32xx_tx_ready(struct uart_port *port) { … } static void __serial_lpc32xx_tx(struct uart_port *port) { … } static irqreturn_t serial_lpc32xx_interrupt(int irq, void *dev_id) { … } /* port->lock is not held. */ static unsigned int serial_lpc32xx_tx_empty(struct uart_port *port) { … } /* port->lock held by caller. */ static void serial_lpc32xx_set_mctrl(struct uart_port *port, unsigned int mctrl) { … } /* port->lock is held by caller and interrupts are disabled. */ static unsigned int serial_lpc32xx_get_mctrl(struct uart_port *port) { … } /* port->lock held by caller. */ static void serial_lpc32xx_stop_tx(struct uart_port *port) { … } /* port->lock held by caller. */ static void serial_lpc32xx_start_tx(struct uart_port *port) { … } /* port->lock held by caller. */ static void serial_lpc32xx_stop_rx(struct uart_port *port) { … } /* port->lock is not held. */ static void serial_lpc32xx_break_ctl(struct uart_port *port, int break_state) { … } /* port->lock is not held. */ static int serial_lpc32xx_startup(struct uart_port *port) { … } /* port->lock is not held. */ static void serial_lpc32xx_shutdown(struct uart_port *port) { … } /* port->lock is not held. */ static void serial_lpc32xx_set_termios(struct uart_port *port, struct ktermios *termios, const struct ktermios *old) { … } static const char *serial_lpc32xx_type(struct uart_port *port) { … } static void serial_lpc32xx_release_port(struct uart_port *port) { … } static int serial_lpc32xx_request_port(struct uart_port *port) { … } static void serial_lpc32xx_config_port(struct uart_port *port, int uflags) { … } static int serial_lpc32xx_verify_port(struct uart_port *port, struct serial_struct *ser) { … } static const struct uart_ops serial_lpc32xx_pops = …; /* * Register a set of serial devices attached to a platform device */ static int serial_hs_lpc32xx_probe(struct platform_device *pdev) { … } /* * Remove serial ports registered against a platform device. */ static void serial_hs_lpc32xx_remove(struct platform_device *pdev) { … } #ifdef CONFIG_PM static int serial_hs_lpc32xx_suspend(struct platform_device *pdev, pm_message_t state) { … } static int serial_hs_lpc32xx_resume(struct platform_device *pdev) { … } #else #define serial_hs_lpc32xx_suspend … #define serial_hs_lpc32xx_resume … #endif static const struct of_device_id serial_hs_lpc32xx_dt_ids[] = …; MODULE_DEVICE_TABLE(of, serial_hs_lpc32xx_dt_ids); static struct platform_driver serial_hs_lpc32xx_driver = …; static int __init lpc32xx_hsuart_init(void) { … } static void __exit lpc32xx_hsuart_exit(void) { … } module_init(…) …; module_exit(lpc32xx_hsuart_exit); MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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