// SPDX-License-Identifier: GPL-2.0+ /* * SiFive UART driver * Copyright (C) 2018 Paul Walmsley <[email protected]> * Copyright (C) 2018-2019 SiFive * * Based partially on: * - drivers/tty/serial/pxa.c * - drivers/tty/serial/amba-pl011.c * - drivers/tty/serial/uartlite.c * - drivers/tty/serial/omap-serial.c * - drivers/pwm/pwm-sifive.c * * See the following sources for further documentation: * - Chapter 19 "Universal Asynchronous Receiver/Transmitter (UART)" of * SiFive FE310-G000 v2p3 * - The tree/master/src/main/scala/devices/uart directory of * https://github.com/sifive/sifive-blocks/ * * The SiFive UART design is not 8250-compatible. The following common * features are not supported: * - Word lengths other than 8 bits * - Break handling * - Parity * - Flow control * - Modem signals (DSR, RI, etc.) * On the other hand, the design is free from the baggage of the 8250 * programming model. */ #include <linux/clk.h> #include <linux/console.h> #include <linux/delay.h> #include <linux/init.h> #include <linux/io.h> #include <linux/irq.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_irq.h> #include <linux/platform_device.h> #include <linux/serial_core.h> #include <linux/serial_reg.h> #include <linux/slab.h> #include <linux/tty.h> #include <linux/tty_flip.h> /* * Register offsets */ /* TXDATA */ #define SIFIVE_SERIAL_TXDATA_OFFS … #define SIFIVE_SERIAL_TXDATA_FULL_SHIFT … #define SIFIVE_SERIAL_TXDATA_FULL_MASK … #define SIFIVE_SERIAL_TXDATA_DATA_SHIFT … #define SIFIVE_SERIAL_TXDATA_DATA_MASK … /* RXDATA */ #define SIFIVE_SERIAL_RXDATA_OFFS … #define SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT … #define SIFIVE_SERIAL_RXDATA_EMPTY_MASK … #define SIFIVE_SERIAL_RXDATA_DATA_SHIFT … #define SIFIVE_SERIAL_RXDATA_DATA_MASK … /* TXCTRL */ #define SIFIVE_SERIAL_TXCTRL_OFFS … #define SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT … #define SIFIVE_SERIAL_TXCTRL_TXCNT_MASK … #define SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT … #define SIFIVE_SERIAL_TXCTRL_NSTOP_MASK … #define SIFIVE_SERIAL_TXCTRL_TXEN_SHIFT … #define SIFIVE_SERIAL_TXCTRL_TXEN_MASK … /* RXCTRL */ #define SIFIVE_SERIAL_RXCTRL_OFFS … #define SIFIVE_SERIAL_RXCTRL_RXCNT_SHIFT … #define SIFIVE_SERIAL_RXCTRL_RXCNT_MASK … #define SIFIVE_SERIAL_RXCTRL_RXEN_SHIFT … #define SIFIVE_SERIAL_RXCTRL_RXEN_MASK … /* IE */ #define SIFIVE_SERIAL_IE_OFFS … #define SIFIVE_SERIAL_IE_RXWM_SHIFT … #define SIFIVE_SERIAL_IE_RXWM_MASK … #define SIFIVE_SERIAL_IE_TXWM_SHIFT … #define SIFIVE_SERIAL_IE_TXWM_MASK … /* IP */ #define SIFIVE_SERIAL_IP_OFFS … #define SIFIVE_SERIAL_IP_RXWM_SHIFT … #define SIFIVE_SERIAL_IP_RXWM_MASK … #define SIFIVE_SERIAL_IP_TXWM_SHIFT … #define SIFIVE_SERIAL_IP_TXWM_MASK … /* DIV */ #define SIFIVE_SERIAL_DIV_OFFS … #define SIFIVE_SERIAL_DIV_DIV_SHIFT … #define SIFIVE_SERIAL_DIV_DIV_MASK … /* * Config macros */ /* * SIFIVE_SERIAL_MAX_PORTS: maximum number of UARTs on a device that can * host a serial console */ #define SIFIVE_SERIAL_MAX_PORTS … /* * SIFIVE_DEFAULT_BAUD_RATE: default baud rate that the driver should * configure itself to use */ #define SIFIVE_DEFAULT_BAUD_RATE … /* SIFIVE_SERIAL_NAME: our driver's name that we pass to the operating system */ #define SIFIVE_SERIAL_NAME … /* SIFIVE_TTY_PREFIX: tty name prefix for SiFive serial ports */ #define SIFIVE_TTY_PREFIX … /* SIFIVE_TX_FIFO_DEPTH: depth of the TX FIFO (in bytes) */ #define SIFIVE_TX_FIFO_DEPTH … /* SIFIVE_RX_FIFO_DEPTH: depth of the TX FIFO (in bytes) */ #define SIFIVE_RX_FIFO_DEPTH … #if (SIFIVE_TX_FIFO_DEPTH != SIFIVE_RX_FIFO_DEPTH) #error Driver does not support configurations with different TX, RX FIFO sizes #endif /* * */ /** * struct sifive_serial_port - driver-specific data extension to struct uart_port * @port: struct uart_port embedded in this struct * @dev: struct device * * @ier: shadowed copy of the interrupt enable register * @baud_rate: UART serial line rate (e.g., 115200 baud) * @clk: reference to this device's clock * @clk_notifier: clock rate change notifier for upstream clock changes * * Configuration data specific to this SiFive UART. */ struct sifive_serial_port { … }; /* * Structure container-of macros */ #define port_to_sifive_serial_port(p) … #define notifier_to_sifive_serial_port(nb) … /* * Forward declarations */ static void sifive_serial_stop_tx(struct uart_port *port); /* * Internal functions */ /** * __ssp_early_writel() - write to a SiFive serial port register (early) * @port: pointer to a struct uart_port record * @offs: register address offset from the IP block base address * @v: value to write to the register * * Given a pointer @port to a struct uart_port record, write the value * @v to the IP block register address offset @offs. This function is * intended for early console use. * * Context: Intended to be used only by the earlyconsole code. */ static void __ssp_early_writel(u32 v, u16 offs, struct uart_port *port) { … } /** * __ssp_early_readl() - read from a SiFive serial port register (early) * @port: pointer to a struct uart_port record * @offs: register address offset from the IP block base address * * Given a pointer @port to a struct uart_port record, read the * contents of the IP block register located at offset @offs from the * IP block base and return it. This function is intended for early * console use. * * Context: Intended to be called only by the earlyconsole code or by * __ssp_readl() or __ssp_writel() (in this driver) * * Returns: the register value read from the UART. */ static u32 __ssp_early_readl(struct uart_port *port, u16 offs) { … } /** * __ssp_writel() - write to a SiFive serial port register * @v: value to write to the register * @offs: register address offset from the IP block base address * @ssp: pointer to a struct sifive_serial_port record * * Write the value @v to the IP block register located at offset @offs from the * IP block base, given a pointer @ssp to a struct sifive_serial_port record. * * Context: Any context. */ static void __ssp_writel(u32 v, u16 offs, struct sifive_serial_port *ssp) { … } /** * __ssp_readl() - read from a SiFive serial port register * @ssp: pointer to a struct sifive_serial_port record * @offs: register address offset from the IP block base address * * Read the contents of the IP block register located at offset @offs from the * IP block base, given a pointer @ssp to a struct sifive_serial_port record. * * Context: Any context. * * Returns: the value of the UART register */ static u32 __ssp_readl(struct sifive_serial_port *ssp, u16 offs) { … } /** * sifive_serial_is_txfifo_full() - is the TXFIFO full? * @ssp: pointer to a struct sifive_serial_port * * Read the transmit FIFO "full" bit, returning a non-zero value if the * TX FIFO is full, or zero if space remains. Intended to be used to prevent * writes to the TX FIFO when it's full. * * Returns: SIFIVE_SERIAL_TXDATA_FULL_MASK (non-zero) if the transmit FIFO * is full, or 0 if space remains. */ static int sifive_serial_is_txfifo_full(struct sifive_serial_port *ssp) { … } /** * __ssp_transmit_char() - enqueue a byte to transmit onto the TX FIFO * @ssp: pointer to a struct sifive_serial_port * @ch: character to transmit * * Enqueue a byte @ch onto the transmit FIFO, given a pointer @ssp to the * struct sifive_serial_port * to transmit on. Caller should first check to * ensure that the TXFIFO has space; see sifive_serial_is_txfifo_full(). * * Context: Any context. */ static void __ssp_transmit_char(struct sifive_serial_port *ssp, int ch) { … } /** * __ssp_transmit_chars() - enqueue multiple bytes onto the TX FIFO * @ssp: pointer to a struct sifive_serial_port * * Transfer up to a TX FIFO size's worth of characters from the Linux serial * transmit buffer to the SiFive UART TX FIFO. * * Context: Any context. Expects @ssp->port.lock to be held by caller. */ static void __ssp_transmit_chars(struct sifive_serial_port *ssp) { … } /** * __ssp_enable_txwm() - enable transmit watermark interrupts * @ssp: pointer to a struct sifive_serial_port * * Enable interrupt generation when the transmit FIFO watermark is reached * on the SiFive UART referred to by @ssp. */ static void __ssp_enable_txwm(struct sifive_serial_port *ssp) { … } /** * __ssp_enable_rxwm() - enable receive watermark interrupts * @ssp: pointer to a struct sifive_serial_port * * Enable interrupt generation when the receive FIFO watermark is reached * on the SiFive UART referred to by @ssp. */ static void __ssp_enable_rxwm(struct sifive_serial_port *ssp) { … } /** * __ssp_disable_txwm() - disable transmit watermark interrupts * @ssp: pointer to a struct sifive_serial_port * * Disable interrupt generation when the transmit FIFO watermark is reached * on the UART referred to by @ssp. */ static void __ssp_disable_txwm(struct sifive_serial_port *ssp) { … } /** * __ssp_disable_rxwm() - disable receive watermark interrupts * @ssp: pointer to a struct sifive_serial_port * * Disable interrupt generation when the receive FIFO watermark is reached * on the UART referred to by @ssp. */ static void __ssp_disable_rxwm(struct sifive_serial_port *ssp) { … } /** * __ssp_receive_char() - receive a byte from the UART * @ssp: pointer to a struct sifive_serial_port * @is_empty: char pointer to return whether the RX FIFO is empty * * Try to read a byte from the SiFive UART RX FIFO, referenced by * @ssp, and to return it. Also returns the RX FIFO empty bit in * the char pointed to by @ch. The caller must pass the byte back to the * Linux serial layer if needed. * * Returns: the byte read from the UART RX FIFO. */ static char __ssp_receive_char(struct sifive_serial_port *ssp, char *is_empty) { … } /** * __ssp_receive_chars() - receive multiple bytes from the UART * @ssp: pointer to a struct sifive_serial_port * * Receive up to an RX FIFO's worth of bytes from the SiFive UART referred * to by @ssp and pass them up to the Linux serial layer. * * Context: Expects ssp->port.lock to be held by caller. */ static void __ssp_receive_chars(struct sifive_serial_port *ssp) { … } /** * __ssp_update_div() - calculate the divisor setting by the line rate * @ssp: pointer to a struct sifive_serial_port * * Calculate the appropriate value of the clock divisor for the UART * and target line rate referred to by @ssp and write it into the * hardware. */ static void __ssp_update_div(struct sifive_serial_port *ssp) { … } /** * __ssp_update_baud_rate() - set the UART "baud rate" * @ssp: pointer to a struct sifive_serial_port * @rate: new target bit rate * * Calculate the UART divisor value for the target bit rate @rate for the * SiFive UART described by @ssp and program it into the UART. There may * be some error between the target bit rate and the actual bit rate implemented * by the UART due to clock ratio granularity. */ static void __ssp_update_baud_rate(struct sifive_serial_port *ssp, unsigned int rate) { … } /** * __ssp_set_stop_bits() - set the number of stop bits * @ssp: pointer to a struct sifive_serial_port * @nstop: 1 or 2 (stop bits) * * Program the SiFive UART referred to by @ssp to use @nstop stop bits. */ static void __ssp_set_stop_bits(struct sifive_serial_port *ssp, char nstop) { … } /** * __ssp_wait_for_xmitr() - wait for an empty slot on the TX FIFO * @ssp: pointer to a struct sifive_serial_port * * Delay while the UART TX FIFO referred to by @ssp is marked as full. * * Context: Any context. */ static void __maybe_unused __ssp_wait_for_xmitr(struct sifive_serial_port *ssp) { … } /* * Linux serial API functions */ static void sifive_serial_stop_tx(struct uart_port *port) { … } static void sifive_serial_stop_rx(struct uart_port *port) { … } static void sifive_serial_start_tx(struct uart_port *port) { … } static irqreturn_t sifive_serial_irq(int irq, void *dev_id) { … } static unsigned int sifive_serial_tx_empty(struct uart_port *port) { … } static unsigned int sifive_serial_get_mctrl(struct uart_port *port) { … } static void sifive_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) { … } static void sifive_serial_break_ctl(struct uart_port *port, int break_state) { … } static int sifive_serial_startup(struct uart_port *port) { … } static void sifive_serial_shutdown(struct uart_port *port) { … } /** * sifive_serial_clk_notifier() - clock post-rate-change notifier * @nb: pointer to the struct notifier_block, from the notifier code * @event: event mask from the notifier code * @data: pointer to the struct clk_notifier_data from the notifier code * * On the V0 SoC, the UART IP block is derived from the CPU clock source * after a synchronous divide-by-two divider, so any CPU clock rate change * requires the UART baud rate to be updated. This presumably corrupts any * serial word currently being transmitted or received. In order to avoid * corrupting the output data stream, we drain the transmit queue before * allowing the clock's rate to be changed. */ static int sifive_serial_clk_notifier(struct notifier_block *nb, unsigned long event, void *data) { … } static void sifive_serial_set_termios(struct uart_port *port, struct ktermios *termios, const struct ktermios *old) { … } static void sifive_serial_release_port(struct uart_port *port) { … } static int sifive_serial_request_port(struct uart_port *port) { … } static void sifive_serial_config_port(struct uart_port *port, int flags) { … } static int sifive_serial_verify_port(struct uart_port *port, struct serial_struct *ser) { … } static const char *sifive_serial_type(struct uart_port *port) { … } #ifdef CONFIG_CONSOLE_POLL static int sifive_serial_poll_get_char(struct uart_port *port) { … } static void sifive_serial_poll_put_char(struct uart_port *port, unsigned char c) { … } #endif /* CONFIG_CONSOLE_POLL */ /* * Early console support */ #ifdef CONFIG_SERIAL_EARLYCON static void early_sifive_serial_putc(struct uart_port *port, unsigned char c) { … } static void early_sifive_serial_write(struct console *con, const char *s, unsigned int n) { … } static int __init early_sifive_serial_setup(struct earlycon_device *dev, const char *options) { … } OF_EARLYCON_DECLARE(…); OF_EARLYCON_DECLARE(…); #endif /* CONFIG_SERIAL_EARLYCON */ /* * Linux console interface */ #ifdef CONFIG_SERIAL_SIFIVE_CONSOLE static struct sifive_serial_port *sifive_serial_console_ports[SIFIVE_SERIAL_MAX_PORTS]; static void sifive_serial_console_putchar(struct uart_port *port, unsigned char ch) { … } static void sifive_serial_console_write(struct console *co, const char *s, unsigned int count) { … } static int sifive_serial_console_setup(struct console *co, char *options) { … } static struct uart_driver sifive_serial_uart_driver; static struct console sifive_serial_console = …; static int __init sifive_console_init(void) { … } console_initcall(sifive_console_init); static void __ssp_add_console_port(struct sifive_serial_port *ssp) { … } static void __ssp_remove_console_port(struct sifive_serial_port *ssp) { … } #define SIFIVE_SERIAL_CONSOLE … #else #define SIFIVE_SERIAL_CONSOLE … static void __ssp_add_console_port(struct sifive_serial_port *ssp) {} static void __ssp_remove_console_port(struct sifive_serial_port *ssp) {} #endif static const struct uart_ops sifive_serial_uops = …; static struct uart_driver sifive_serial_uart_driver = …; static int sifive_serial_probe(struct platform_device *pdev) { … } static void sifive_serial_remove(struct platform_device *dev) { … } static int sifive_serial_suspend(struct device *dev) { … } static int sifive_serial_resume(struct device *dev) { … } static DEFINE_SIMPLE_DEV_PM_OPS(sifive_uart_pm_ops, sifive_serial_suspend, sifive_serial_resume); static const struct of_device_id sifive_serial_of_match[] = …; MODULE_DEVICE_TABLE(of, sifive_serial_of_match); static struct platform_driver sifive_serial_platform_driver = …; static int __init sifive_serial_init(void) { … } static void __exit sifive_serial_exit(void) { … } module_init(…) …; module_exit(sifive_serial_exit); MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; MODULE_AUTHOR(…) …;
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