linux/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c

// SPDX-License-Identifier: GPL-2.0-only
// Miscellaneous Arm SMMU implementation and integration quirks
// Copyright (C) 2019 Arm Limited

#define pr_fmt(fmt) …

#include <linux/bitfield.h>
#include <linux/of.h>

#include "arm-smmu.h"


static int arm_smmu_gr0_ns(int offset)
{ … }

static u32 arm_smmu_read_ns(struct arm_smmu_device *smmu, int page,
			    int offset)
{ … }

static void arm_smmu_write_ns(struct arm_smmu_device *smmu, int page,
			      int offset, u32 val)
{ … }

/* Since we don't care for sGFAR, we can do without 64-bit accessors */
static const struct arm_smmu_impl calxeda_impl = …;


struct cavium_smmu { … };

static int cavium_cfg_probe(struct arm_smmu_device *smmu)
{ … }

static int cavium_init_context(struct arm_smmu_domain *smmu_domain,
		struct io_pgtable_cfg *pgtbl_cfg, struct device *dev)
{ … }

static const struct arm_smmu_impl cavium_impl = …;

static struct arm_smmu_device *cavium_smmu_impl_init(struct arm_smmu_device *smmu)
{ … }


#define ARM_MMU500_ACTLR_CPRE …

#define ARM_MMU500_ACR_CACHE_LOCK …
#define ARM_MMU500_ACR_S2CRB_TLBEN …
#define ARM_MMU500_ACR_SMTNMB_TLBEN …

int arm_mmu500_reset(struct arm_smmu_device *smmu)
{ … }

static const struct arm_smmu_impl arm_mmu500_impl = …;

static u64 mrvl_mmu500_readq(struct arm_smmu_device *smmu, int page, int off)
{ … }

static void mrvl_mmu500_writeq(struct arm_smmu_device *smmu, int page, int off,
			       u64 val)
{ … }

static int mrvl_mmu500_cfg_probe(struct arm_smmu_device *smmu)
{ … }

static const struct arm_smmu_impl mrvl_mmu500_impl = …;


struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu)
{ … }