linux/include/linux/tegra-icc.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2022-2023 NVIDIA CORPORATION.  All rights reserved.
 */

#ifndef LINUX_TEGRA_ICC_H
#define LINUX_TEGRA_ICC_H

enum tegra_icc_client_type {};

/* ICC ID's for MC client's used in BPMP */
#define TEGRA_ICC_BPMP_DEBUG
#define TEGRA_ICC_BPMP_CPU_CLUSTER0
#define TEGRA_ICC_BPMP_CPU_CLUSTER1
#define TEGRA_ICC_BPMP_CPU_CLUSTER2
#define TEGRA_ICC_BPMP_GPU
#define TEGRA_ICC_BPMP_CACTMON
#define TEGRA_ICC_BPMP_DISPLAY
#define TEGRA_ICC_BPMP_VI
#define TEGRA_ICC_BPMP_EQOS
#define TEGRA_ICC_BPMP_PCIE_0
#define TEGRA_ICC_BPMP_PCIE_1
#define TEGRA_ICC_BPMP_PCIE_2
#define TEGRA_ICC_BPMP_PCIE_3
#define TEGRA_ICC_BPMP_PCIE_4
#define TEGRA_ICC_BPMP_PCIE_5
#define TEGRA_ICC_BPMP_PCIE_6
#define TEGRA_ICC_BPMP_PCIE_7
#define TEGRA_ICC_BPMP_PCIE_8
#define TEGRA_ICC_BPMP_PCIE_9
#define TEGRA_ICC_BPMP_PCIE_10
#define TEGRA_ICC_BPMP_DLA_0
#define TEGRA_ICC_BPMP_DLA_1
#define TEGRA_ICC_BPMP_SDMMC_1
#define TEGRA_ICC_BPMP_SDMMC_2
#define TEGRA_ICC_BPMP_SDMMC_3
#define TEGRA_ICC_BPMP_SDMMC_4
#define TEGRA_ICC_BPMP_NVDEC
#define TEGRA_ICC_BPMP_NVENC
#define TEGRA_ICC_BPMP_NVJPG_0
#define TEGRA_ICC_BPMP_NVJPG_1
#define TEGRA_ICC_BPMP_OFAA
#define TEGRA_ICC_BPMP_XUSB_HOST
#define TEGRA_ICC_BPMP_XUSB_DEV
#define TEGRA_ICC_BPMP_TSEC
#define TEGRA_ICC_BPMP_VIC
#define TEGRA_ICC_BPMP_APE
#define TEGRA_ICC_BPMP_APEDMA
#define TEGRA_ICC_BPMP_SE
#define TEGRA_ICC_BPMP_ISP
#define TEGRA_ICC_BPMP_HDA
#define TEGRA_ICC_BPMP_VIFAL
#define TEGRA_ICC_BPMP_VI2FAL
#define TEGRA_ICC_BPMP_VI2
#define TEGRA_ICC_BPMP_RCE
#define TEGRA_ICC_BPMP_PVA

#endif /* LINUX_TEGRA_ICC_H */