// SPDX-License-Identifier: GPL-2.0 /* * IOMMU API for Renesas VMSA-compatible IPMMU * Author: Laurent Pinchart <[email protected]> * * Copyright (C) 2014-2020 Renesas Electronics Corporation */ #include <linux/bitmap.h> #include <linux/delay.h> #include <linux/dma-mapping.h> #include <linux/err.h> #include <linux/export.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/iopoll.h> #include <linux/io-pgtable.h> #include <linux/iommu.h> #include <linux/of.h> #include <linux/of_platform.h> #include <linux/pci.h> #include <linux/platform_device.h> #include <linux/sizes.h> #include <linux/slab.h> #include <linux/sys_soc.h> #if defined(CONFIG_ARM) && !defined(CONFIG_IOMMU_DMA) #include <asm/dma-iommu.h> #else #define arm_iommu_create_mapping(...) … #define arm_iommu_attach_device(...) … #define arm_iommu_release_mapping(...) … #endif #define IPMMU_CTX_MAX … #define IPMMU_CTX_INVALID … #define IPMMU_UTLB_MAX … struct ipmmu_features { … }; struct ipmmu_vmsa_device { … }; struct ipmmu_vmsa_domain { … }; static struct ipmmu_vmsa_domain *to_vmsa_domain(struct iommu_domain *dom) { … } static struct ipmmu_vmsa_device *to_ipmmu(struct device *dev) { … } #define TLB_LOOP_TIMEOUT … /* ----------------------------------------------------------------------------- * Registers Definition */ #define IM_NS_ALIAS_OFFSET … /* MMU "context" registers */ #define IMCTR … #define IMCTR_INTEN … #define IMCTR_FLUSH … #define IMCTR_MMUEN … #define IMTTBCR … #define IMTTBCR_EAE … #define IMTTBCR_SH0_INNER_SHAREABLE … #define IMTTBCR_ORGN0_WB_WA … #define IMTTBCR_IRGN0_WB_WA … #define IMTTBCR_SL0_TWOBIT_LVL_1 … #define IMTTBCR_SL0_LVL_1 … #define IMBUSCR … #define IMBUSCR_DVM … #define IMBUSCR_BUSSEL_MASK … #define IMTTLBR0 … #define IMTTUBR0 … #define IMSTR … #define IMSTR_MHIT … #define IMSTR_ABORT … #define IMSTR_PF … #define IMSTR_TF … #define IMMAIR0 … #define IMELAR … #define IMEUAR … /* uTLB registers */ #define IMUCTR(n) … #define IMUCTR0(n) … #define IMUCTR32(n) … #define IMUCTR_TTSEL_MMU(n) … #define IMUCTR_FLUSH … #define IMUCTR_MMUEN … #define IMUASID(n) … #define IMUASID0(n) … #define IMUASID32(n) … /* ----------------------------------------------------------------------------- * Root device handling */ static struct platform_driver ipmmu_driver; static bool ipmmu_is_root(struct ipmmu_vmsa_device *mmu) { … } static int __ipmmu_check_device(struct device *dev, void *data) { … } static struct ipmmu_vmsa_device *ipmmu_find_root(void) { … } /* ----------------------------------------------------------------------------- * Read/Write Access */ static u32 ipmmu_read(struct ipmmu_vmsa_device *mmu, unsigned int offset) { … } static void ipmmu_write(struct ipmmu_vmsa_device *mmu, unsigned int offset, u32 data) { … } static unsigned int ipmmu_ctx_reg(struct ipmmu_vmsa_device *mmu, unsigned int context_id, unsigned int reg) { … } static u32 ipmmu_ctx_read(struct ipmmu_vmsa_device *mmu, unsigned int context_id, unsigned int reg) { … } static void ipmmu_ctx_write(struct ipmmu_vmsa_device *mmu, unsigned int context_id, unsigned int reg, u32 data) { … } static u32 ipmmu_ctx_read_root(struct ipmmu_vmsa_domain *domain, unsigned int reg) { … } static void ipmmu_ctx_write_root(struct ipmmu_vmsa_domain *domain, unsigned int reg, u32 data) { … } static void ipmmu_ctx_write_all(struct ipmmu_vmsa_domain *domain, unsigned int reg, u32 data) { … } static u32 ipmmu_utlb_reg(struct ipmmu_vmsa_device *mmu, unsigned int reg) { … } static void ipmmu_imuasid_write(struct ipmmu_vmsa_device *mmu, unsigned int utlb, u32 data) { … } static void ipmmu_imuctr_write(struct ipmmu_vmsa_device *mmu, unsigned int utlb, u32 data) { … } /* ----------------------------------------------------------------------------- * TLB and microTLB Management */ /* Wait for any pending TLB invalidations to complete */ static void ipmmu_tlb_sync(struct ipmmu_vmsa_domain *domain) { … } static void ipmmu_tlb_invalidate(struct ipmmu_vmsa_domain *domain) { … } /* * Enable MMU translation for the microTLB. */ static void ipmmu_utlb_enable(struct ipmmu_vmsa_domain *domain, unsigned int utlb) { … } /* * Disable MMU translation for the microTLB. */ static void ipmmu_utlb_disable(struct ipmmu_vmsa_domain *domain, unsigned int utlb) { … } static void ipmmu_tlb_flush_all(void *cookie) { … } static void ipmmu_tlb_flush(unsigned long iova, size_t size, size_t granule, void *cookie) { … } static const struct iommu_flush_ops ipmmu_flush_ops = …; /* ----------------------------------------------------------------------------- * Domain/Context Management */ static int ipmmu_domain_allocate_context(struct ipmmu_vmsa_device *mmu, struct ipmmu_vmsa_domain *domain) { … } static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu, unsigned int context_id) { … } static void ipmmu_domain_setup_context(struct ipmmu_vmsa_domain *domain) { … } static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) { … } static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain) { … } /* ----------------------------------------------------------------------------- * Fault Handling */ static irqreturn_t ipmmu_domain_irq(struct ipmmu_vmsa_domain *domain) { … } static irqreturn_t ipmmu_irq(int irq, void *dev) { … } /* ----------------------------------------------------------------------------- * IOMMU Operations */ static struct iommu_domain *ipmmu_domain_alloc_paging(struct device *dev) { … } static void ipmmu_domain_free(struct iommu_domain *io_domain) { … } static int ipmmu_attach_device(struct iommu_domain *io_domain, struct device *dev) { … } static int ipmmu_iommu_identity_attach(struct iommu_domain *identity_domain, struct device *dev) { … } static struct iommu_domain_ops ipmmu_iommu_identity_ops = …; static struct iommu_domain ipmmu_iommu_identity_domain = …; static int ipmmu_map(struct iommu_domain *io_domain, unsigned long iova, phys_addr_t paddr, size_t pgsize, size_t pgcount, int prot, gfp_t gfp, size_t *mapped) { … } static size_t ipmmu_unmap(struct iommu_domain *io_domain, unsigned long iova, size_t pgsize, size_t pgcount, struct iommu_iotlb_gather *gather) { … } static void ipmmu_flush_iotlb_all(struct iommu_domain *io_domain) { … } static void ipmmu_iotlb_sync(struct iommu_domain *io_domain, struct iommu_iotlb_gather *gather) { … } static phys_addr_t ipmmu_iova_to_phys(struct iommu_domain *io_domain, dma_addr_t iova) { … } static int ipmmu_init_platform_device(struct device *dev, const struct of_phandle_args *args) { … } static const struct soc_device_attribute soc_needs_opt_in[] = …; static const struct soc_device_attribute soc_denylist[] = …; static const char * const devices_allowlist[] = …; static bool ipmmu_device_is_allowed(struct device *dev) { … } static int ipmmu_of_xlate(struct device *dev, const struct of_phandle_args *spec) { … } static int ipmmu_init_arm_mapping(struct device *dev) { … } static struct iommu_device *ipmmu_probe_device(struct device *dev) { … } static void ipmmu_probe_finalize(struct device *dev) { … } static void ipmmu_release_device(struct device *dev) { … } static const struct iommu_ops ipmmu_ops = …; /* ----------------------------------------------------------------------------- * Probe/remove and init */ static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu) { … } static const struct ipmmu_features ipmmu_features_default = …; static const struct ipmmu_features ipmmu_features_rcar_gen3 = …; static const struct ipmmu_features ipmmu_features_rcar_gen4 = …; static const struct of_device_id ipmmu_of_ids[] = …; static int ipmmu_probe(struct platform_device *pdev) { … } static void ipmmu_remove(struct platform_device *pdev) { … } static int ipmmu_resume_noirq(struct device *dev) { … } static const struct dev_pm_ops ipmmu_pm = …; static struct platform_driver ipmmu_driver = …; builtin_platform_driver(…) …;
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