/* SPDX-License-Identifier: MIT * Copyright (C) 2018 Intel Corp. * * Authors: * Manasi Navare <[email protected]> */ #ifndef DRM_DSC_H_ #define DRM_DSC_H_ #include <drm/display/drm_dp.h> /* VESA Display Stream Compression DSC 1.2 constants */ #define DSC_NUM_BUF_RANGES … #define DSC_MUX_WORD_SIZE_8_10_BPC … #define DSC_MUX_WORD_SIZE_12_BPC … #define DSC_RC_PIXELS_PER_GROUP … #define DSC_SCALE_DECREMENT_INTERVAL_MAX … #define DSC_RANGE_BPG_OFFSET_MASK … /* DSC Rate Control Constants */ #define DSC_RC_MODEL_SIZE_CONST … #define DSC_RC_EDGE_FACTOR_CONST … #define DSC_RC_TGT_OFFSET_HI_CONST … #define DSC_RC_TGT_OFFSET_LO_CONST … /* DSC PPS constants and macros */ #define DSC_PPS_VERSION_MAJOR_SHIFT … #define DSC_PPS_BPC_SHIFT … #define DSC_PPS_MSB_SHIFT … #define DSC_PPS_LSB_MASK … #define DSC_PPS_BPP_HIGH_MASK … #define DSC_PPS_VBR_EN_SHIFT … #define DSC_PPS_SIMPLE422_SHIFT … #define DSC_PPS_CONVERT_RGB_SHIFT … #define DSC_PPS_BLOCK_PRED_EN_SHIFT … #define DSC_PPS_INIT_XMIT_DELAY_HIGH_MASK … #define DSC_PPS_SCALE_DEC_INT_HIGH_MASK … #define DSC_PPS_RC_TGT_OFFSET_HI_SHIFT … #define DSC_PPS_RC_RANGE_MINQP_SHIFT … #define DSC_PPS_RC_RANGE_MAXQP_SHIFT … #define DSC_PPS_NATIVE_420_SHIFT … /** * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters * * This defines different rate control parameters used by the DSC engine * to compress the frame. */ struct drm_dsc_rc_range_parameters { … }; /** * struct drm_dsc_config - Parameters required to configure DSC * * Driver populates this structure with all the parameters required * to configure the display stream compression on the source. */ struct drm_dsc_config { … }; /** * struct drm_dsc_picture_parameter_set - Represents 128 bytes of * Picture Parameter Set * * The VESA DSC standard defines picture parameter set (PPS) which display * stream compression encoders must communicate to decoders. * The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in * this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2. * The PPS fields that span over more than a byte should be stored in Big Endian * format. */ struct drm_dsc_picture_parameter_set { … } __packed; /** * struct drm_dsc_pps_infoframe - DSC infoframe carrying the Picture Parameter * Set Metadata * * This structure represents the DSC PPS infoframe required to send the Picture * Parameter Set metadata required before enabling VESA Display Stream * Compression. This is based on the DP Secondary Data Packet structure and * comprises of SDP Header as defined &struct dp_sdp_header in drm_dp_helper.h * and PPS payload defined in &struct drm_dsc_picture_parameter_set. * * @pps_header: Header for PPS as per DP SDP header format of type * &struct dp_sdp_header * @pps_payload: PPS payload fields as per DSC specification Table 4-1 * as represented in &struct drm_dsc_picture_parameter_set */ struct drm_dsc_pps_infoframe { … } __packed; #endif /* _DRM_DSC_H_ */
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