linux/drivers/gpu/drm/radeon/r600_reg.h

/*
 * Copyright 2008 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 * Copyright 2009 Jerome Glisse.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Dave Airlie
 *          Alex Deucher
 *          Jerome Glisse
 */
#ifndef __R600_REG_H__
#define __R600_REG_H__

#define R600_PCIE_PORT_INDEX
#define R600_PCIE_PORT_DATA

#define R600_RCU_INDEX
#define R600_RCU_DATA

#define R600_UVD_CTX_INDEX
#define R600_UVD_CTX_DATA

#define R600_MC_VM_FB_LOCATION
#define R600_MC_FB_BASE_MASK
#define R600_MC_FB_BASE_SHIFT
#define R600_MC_FB_TOP_MASK
#define R600_MC_FB_TOP_SHIFT
#define R600_MC_VM_AGP_TOP
#define R600_MC_AGP_TOP_MASK
#define R600_MC_AGP_TOP_SHIFT
#define R600_MC_VM_AGP_BOT
#define R600_MC_AGP_BOT_MASK
#define R600_MC_AGP_BOT_SHIFT
#define R600_MC_VM_AGP_BASE
#define R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR
#define R600_LOGICAL_PAGE_NUMBER_MASK
#define R600_LOGICAL_PAGE_NUMBER_SHIFT
#define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR
#define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR

#define R700_MC_VM_FB_LOCATION
#define R700_MC_FB_BASE_MASK
#define R700_MC_FB_BASE_SHIFT
#define R700_MC_FB_TOP_MASK
#define R700_MC_FB_TOP_SHIFT
#define R700_MC_VM_AGP_TOP
#define R700_MC_AGP_TOP_MASK
#define R700_MC_AGP_TOP_SHIFT
#define R700_MC_VM_AGP_BOT
#define R700_MC_AGP_BOT_MASK
#define R700_MC_AGP_BOT_SHIFT
#define R700_MC_VM_AGP_BASE
#define R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR
#define R700_LOGICAL_PAGE_NUMBER_MASK
#define R700_LOGICAL_PAGE_NUMBER_SHIFT
#define R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR
#define R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR

#define R600_RAMCFG
#define R600_CHANSIZE
#define R600_CHANSIZE_OVERRIDE


#define R600_GENERAL_PWRMGT
#define R600_OPEN_DRAIN_PADS

#define R600_LOWER_GPIO_ENABLE
#define R600_CTXSW_VID_LOWER_GPIO_CNTL
#define R600_HIGH_VID_LOWER_GPIO_CNTL
#define R600_MEDIUM_VID_LOWER_GPIO_CNTL
#define R600_LOW_VID_LOWER_GPIO_CNTL

#define R600_D1GRPH_SWAP_CONTROL
#define R600_D1GRPH_ENDIAN_SWAP(x)
#define R600_D1GRPH_SWAP_ENDIAN_NONE
#define R600_D1GRPH_SWAP_ENDIAN_16BIT
#define R600_D1GRPH_SWAP_ENDIAN_32BIT
#define R600_D1GRPH_SWAP_ENDIAN_64BIT
#define R600_D1GRPH_RED_CROSSBAR(x)
#define R600_D1GRPH_RED_SEL_R
#define R600_D1GRPH_RED_SEL_G
#define R600_D1GRPH_RED_SEL_B
#define R600_D1GRPH_RED_SEL_A
#define R600_D1GRPH_GREEN_CROSSBAR(x)
#define R600_D1GRPH_GREEN_SEL_G
#define R600_D1GRPH_GREEN_SEL_B
#define R600_D1GRPH_GREEN_SEL_A
#define R600_D1GRPH_GREEN_SEL_R
#define R600_D1GRPH_BLUE_CROSSBAR(x)
#define R600_D1GRPH_BLUE_SEL_B
#define R600_D1GRPH_BLUE_SEL_A
#define R600_D1GRPH_BLUE_SEL_R
#define R600_D1GRPH_BLUE_SEL_G
#define R600_D1GRPH_ALPHA_CROSSBAR(x)
#define R600_D1GRPH_ALPHA_SEL_A
#define R600_D1GRPH_ALPHA_SEL_R
#define R600_D1GRPH_ALPHA_SEL_G
#define R600_D1GRPH_ALPHA_SEL_B

#define R600_HDP_NONSURFACE_BASE

#define R600_BUS_CNTL
#define R600_BIOS_ROM_DIS
#define R600_CONFIG_CNTL
#define R600_CONFIG_MEMSIZE
#define R600_CONFIG_F0_BASE
#define R600_CONFIG_APER_SIZE

#define R600_BIF_FB_EN
#define R600_FB_READ_EN
#define R600_FB_WRITE_EN

#define R600_CITF_CNTL
#define R600_BLACKOUT_MASK

#define R700_MC_CITF_CNTL

#define R600_ROM_CNTL
#define R600_SCK_OVERWRITE
#define R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT
#define R600_SCK_PRESCALE_CRYSTAL_CLK_MASK

#define R600_CG_SPLL_FUNC_CNTL
#define R600_SPLL_BYPASS_EN
#define R600_CG_SPLL_STATUS
#define R600_SPLL_CHG_STATUS

#define R600_BIOS_0_SCRATCH
#define R600_BIOS_1_SCRATCH
#define R600_BIOS_2_SCRATCH
#define R600_BIOS_3_SCRATCH
#define R600_BIOS_4_SCRATCH
#define R600_BIOS_5_SCRATCH
#define R600_BIOS_6_SCRATCH
#define R600_BIOS_7_SCRATCH

/* Audio, these regs were reverse enginered,
 * so the chance is high that the naming is wrong
 * R6xx+ ??? */

/* Audio clocks */
#define R600_AUDIO_PLL1_MUL
#define R600_AUDIO_PLL1_DIV
#define R600_AUDIO_PLL2_MUL
#define R600_AUDIO_PLL2_DIV
#define R600_AUDIO_CLK_SRCSEL

/* Audio general */
#define R600_AUDIO_ENABLE
#define R600_AUDIO_TIMING

/* Audio params */
#define R600_AUDIO_VENDOR_ID
#define R600_AUDIO_REVISION_ID
#define R600_AUDIO_ROOT_NODE_COUNT
#define R600_AUDIO_NID1_NODE_COUNT
#define R600_AUDIO_NID1_TYPE
#define R600_AUDIO_SUPPORTED_SIZE_RATE
#define R600_AUDIO_SUPPORTED_CODEC
#define R600_AUDIO_SUPPORTED_POWER_STATES
#define R600_AUDIO_NID2_CAPS
#define R600_AUDIO_NID3_CAPS
#define R600_AUDIO_NID3_PIN_CAPS

/* Audio conn list */
#define R600_AUDIO_CONN_LIST_LEN
#define R600_AUDIO_CONN_LIST

/* Audio verbs */
#define R600_AUDIO_RATE_BPS_CHANNEL
#define R600_AUDIO_PLAYING
#define R600_AUDIO_IMPLEMENTATION_ID
#define R600_AUDIO_CONFIG_DEFAULT
#define R600_AUDIO_PIN_SENSE
#define R600_AUDIO_PIN_WIDGET_CNTL
#define R600_AUDIO_STATUS_BITS

#define DCE2_HDMI_OFFSET0
#define DCE2_HDMI_OFFSET1
/* DCE3.2 second instance starts at 0x7800 */
#define DCE3_HDMI_OFFSET0
#define DCE3_HDMI_OFFSET1

#endif