linux/drivers/gpu/drm/radeon/r100d.h

/*
 * Copyright 2008 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 * Copyright 2009 Jerome Glisse.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Dave Airlie
 *          Alex Deucher
 *          Jerome Glisse
 */
#ifndef __R100D_H__
#define __R100D_H__

#define CP_PACKET0
#define PACKET0_BASE_INDEX_SHIFT
#define PACKET0_BASE_INDEX_MASK
#define PACKET0_COUNT_SHIFT
#define PACKET0_COUNT_MASK
#define CP_PACKET1
#define CP_PACKET2
#define PACKET2_PAD_SHIFT
#define PACKET2_PAD_MASK
#define CP_PACKET3
#define PACKET3_IT_OPCODE_SHIFT
#define PACKET3_IT_OPCODE_MASK
#define PACKET3_COUNT_SHIFT
#define PACKET3_COUNT_MASK
/* PACKET3 op code */
#define PACKET3_NOP
#define PACKET3_3D_DRAW_VBUF
#define PACKET3_3D_DRAW_IMMD
#define PACKET3_3D_DRAW_INDX
#define PACKET3_3D_LOAD_VBPNTR
#define PACKET3_3D_CLEAR_ZMASK
#define PACKET3_INDX_BUFFER
#define PACKET3_3D_DRAW_VBUF_2
#define PACKET3_3D_DRAW_IMMD_2
#define PACKET3_3D_DRAW_INDX_2
#define PACKET3_3D_CLEAR_HIZ
#define PACKET3_BITBLT_MULTI

#define PACKET0(reg, n)
#define PACKET2(v)
#define PACKET3(op, n)

/* Registers */
#define R_0000F0_RBBM_SOFT_RESET
#define S_0000F0_SOFT_RESET_CP(x)
#define G_0000F0_SOFT_RESET_CP(x)
#define C_0000F0_SOFT_RESET_CP
#define S_0000F0_SOFT_RESET_HI(x)
#define G_0000F0_SOFT_RESET_HI(x)
#define C_0000F0_SOFT_RESET_HI
#define S_0000F0_SOFT_RESET_SE(x)
#define G_0000F0_SOFT_RESET_SE(x)
#define C_0000F0_SOFT_RESET_SE
#define S_0000F0_SOFT_RESET_RE(x)
#define G_0000F0_SOFT_RESET_RE(x)
#define C_0000F0_SOFT_RESET_RE
#define S_0000F0_SOFT_RESET_PP(x)
#define G_0000F0_SOFT_RESET_PP(x)
#define C_0000F0_SOFT_RESET_PP
#define S_0000F0_SOFT_RESET_E2(x)
#define G_0000F0_SOFT_RESET_E2(x)
#define C_0000F0_SOFT_RESET_E2
#define S_0000F0_SOFT_RESET_RB(x)
#define G_0000F0_SOFT_RESET_RB(x)
#define C_0000F0_SOFT_RESET_RB
#define S_0000F0_SOFT_RESET_HDP(x)
#define G_0000F0_SOFT_RESET_HDP(x)
#define C_0000F0_SOFT_RESET_HDP
#define S_0000F0_SOFT_RESET_MC(x)
#define G_0000F0_SOFT_RESET_MC(x)
#define C_0000F0_SOFT_RESET_MC
#define S_0000F0_SOFT_RESET_AIC(x)
#define G_0000F0_SOFT_RESET_AIC(x)
#define C_0000F0_SOFT_RESET_AIC
#define S_0000F0_SOFT_RESET_VIP(x)
#define G_0000F0_SOFT_RESET_VIP(x)
#define C_0000F0_SOFT_RESET_VIP
#define S_0000F0_SOFT_RESET_DISP(x)
#define G_0000F0_SOFT_RESET_DISP(x)
#define C_0000F0_SOFT_RESET_DISP
#define S_0000F0_SOFT_RESET_CG(x)
#define G_0000F0_SOFT_RESET_CG(x)
#define C_0000F0_SOFT_RESET_CG
#define R_000030_BUS_CNTL
#define S_000030_BUS_DBL_RESYNC(x)
#define G_000030_BUS_DBL_RESYNC(x)
#define C_000030_BUS_DBL_RESYNC
#define S_000030_BUS_MSTR_RESET(x)
#define G_000030_BUS_MSTR_RESET(x)
#define C_000030_BUS_MSTR_RESET
#define S_000030_BUS_FLUSH_BUF(x)
#define G_000030_BUS_FLUSH_BUF(x)
#define C_000030_BUS_FLUSH_BUF
#define S_000030_BUS_STOP_REQ_DIS(x)
#define G_000030_BUS_STOP_REQ_DIS(x)
#define C_000030_BUS_STOP_REQ_DIS
#define S_000030_BUS_PM4_READ_COMBINE_EN(x)
#define G_000030_BUS_PM4_READ_COMBINE_EN(x)
#define C_000030_BUS_PM4_READ_COMBINE_EN
#define S_000030_BUS_WRT_COMBINE_EN(x)
#define G_000030_BUS_WRT_COMBINE_EN(x)
#define C_000030_BUS_WRT_COMBINE_EN
#define S_000030_BUS_MASTER_DIS(x)
#define G_000030_BUS_MASTER_DIS(x)
#define C_000030_BUS_MASTER_DIS
#define S_000030_BIOS_ROM_WRT_EN(x)
#define G_000030_BIOS_ROM_WRT_EN(x)
#define C_000030_BIOS_ROM_WRT_EN
#define S_000030_BM_DAC_CRIPPLE(x)
#define G_000030_BM_DAC_CRIPPLE(x)
#define C_000030_BM_DAC_CRIPPLE
#define S_000030_BUS_NON_PM4_READ_COMBINE_EN(x)
#define G_000030_BUS_NON_PM4_READ_COMBINE_EN(x)
#define C_000030_BUS_NON_PM4_READ_COMBINE_EN
#define S_000030_BUS_XFERD_DISCARD_EN(x)
#define G_000030_BUS_XFERD_DISCARD_EN(x)
#define C_000030_BUS_XFERD_DISCARD_EN
#define S_000030_BUS_SGL_READ_DISABLE(x)
#define G_000030_BUS_SGL_READ_DISABLE(x)
#define C_000030_BUS_SGL_READ_DISABLE
#define S_000030_BIOS_DIS_ROM(x)
#define G_000030_BIOS_DIS_ROM(x)
#define C_000030_BIOS_DIS_ROM
#define S_000030_BUS_PCI_READ_RETRY_EN(x)
#define G_000030_BUS_PCI_READ_RETRY_EN(x)
#define C_000030_BUS_PCI_READ_RETRY_EN
#define S_000030_BUS_AGP_AD_STEPPING_EN(x)
#define G_000030_BUS_AGP_AD_STEPPING_EN(x)
#define C_000030_BUS_AGP_AD_STEPPING_EN
#define S_000030_BUS_PCI_WRT_RETRY_EN(x)
#define G_000030_BUS_PCI_WRT_RETRY_EN(x)
#define C_000030_BUS_PCI_WRT_RETRY_EN
#define S_000030_BUS_RETRY_WS(x)
#define G_000030_BUS_RETRY_WS(x)
#define C_000030_BUS_RETRY_WS
#define S_000030_BUS_MSTR_RD_MULT(x)
#define G_000030_BUS_MSTR_RD_MULT(x)
#define C_000030_BUS_MSTR_RD_MULT
#define S_000030_BUS_MSTR_RD_LINE(x)
#define G_000030_BUS_MSTR_RD_LINE(x)
#define C_000030_BUS_MSTR_RD_LINE
#define S_000030_BUS_SUSPEND(x)
#define G_000030_BUS_SUSPEND(x)
#define C_000030_BUS_SUSPEND
#define S_000030_LAT_16X(x)
#define G_000030_LAT_16X(x)
#define C_000030_LAT_16X
#define S_000030_BUS_RD_DISCARD_EN(x)
#define G_000030_BUS_RD_DISCARD_EN(x)
#define C_000030_BUS_RD_DISCARD_EN
#define S_000030_ENFRCWRDY(x)
#define G_000030_ENFRCWRDY(x)
#define C_000030_ENFRCWRDY
#define S_000030_BUS_MSTR_WS(x)
#define G_000030_BUS_MSTR_WS(x)
#define C_000030_BUS_MSTR_WS
#define S_000030_BUS_PARKING_DIS(x)
#define G_000030_BUS_PARKING_DIS(x)
#define C_000030_BUS_PARKING_DIS
#define S_000030_BUS_MSTR_DISCONNECT_EN(x)
#define G_000030_BUS_MSTR_DISCONNECT_EN(x)
#define C_000030_BUS_MSTR_DISCONNECT_EN
#define S_000030_SERR_EN(x)
#define G_000030_SERR_EN(x)
#define C_000030_SERR_EN
#define S_000030_BUS_READ_BURST(x)
#define G_000030_BUS_READ_BURST(x)
#define C_000030_BUS_READ_BURST
#define S_000030_BUS_RDY_READ_DLY(x)
#define G_000030_BUS_RDY_READ_DLY(x)
#define C_000030_BUS_RDY_READ_DLY
#define R_000040_GEN_INT_CNTL
#define S_000040_CRTC_VBLANK(x)
#define G_000040_CRTC_VBLANK(x)
#define C_000040_CRTC_VBLANK
#define S_000040_CRTC_VLINE(x)
#define G_000040_CRTC_VLINE(x)
#define C_000040_CRTC_VLINE
#define S_000040_CRTC_VSYNC(x)
#define G_000040_CRTC_VSYNC(x)
#define C_000040_CRTC_VSYNC
#define S_000040_SNAPSHOT(x)
#define G_000040_SNAPSHOT(x)
#define C_000040_SNAPSHOT
#define S_000040_FP_DETECT(x)
#define G_000040_FP_DETECT(x)
#define C_000040_FP_DETECT
#define S_000040_CRTC2_VLINE(x)
#define G_000040_CRTC2_VLINE(x)
#define C_000040_CRTC2_VLINE
#define S_000040_DMA_VIPH0_INT_EN(x)
#define G_000040_DMA_VIPH0_INT_EN(x)
#define C_000040_DMA_VIPH0_INT_EN
#define S_000040_CRTC2_VSYNC(x)
#define G_000040_CRTC2_VSYNC(x)
#define C_000040_CRTC2_VSYNC
#define S_000040_SNAPSHOT2(x)
#define G_000040_SNAPSHOT2(x)
#define C_000040_SNAPSHOT2
#define S_000040_CRTC2_VBLANK(x)
#define G_000040_CRTC2_VBLANK(x)
#define C_000040_CRTC2_VBLANK
#define S_000040_FP2_DETECT(x)
#define G_000040_FP2_DETECT(x)
#define C_000040_FP2_DETECT
#define S_000040_VSYNC_DIFF_OVER_LIMIT(x)
#define G_000040_VSYNC_DIFF_OVER_LIMIT(x)
#define C_000040_VSYNC_DIFF_OVER_LIMIT
#define S_000040_DMA_VIPH1_INT_EN(x)
#define G_000040_DMA_VIPH1_INT_EN(x)
#define C_000040_DMA_VIPH1_INT_EN
#define S_000040_DMA_VIPH2_INT_EN(x)
#define G_000040_DMA_VIPH2_INT_EN(x)
#define C_000040_DMA_VIPH2_INT_EN
#define S_000040_DMA_VIPH3_INT_EN(x)
#define G_000040_DMA_VIPH3_INT_EN(x)
#define C_000040_DMA_VIPH3_INT_EN
#define S_000040_I2C_INT_EN(x)
#define G_000040_I2C_INT_EN(x)
#define C_000040_I2C_INT_EN
#define S_000040_GUI_IDLE(x)
#define G_000040_GUI_IDLE(x)
#define C_000040_GUI_IDLE
#define S_000040_VIPH_INT_EN(x)
#define G_000040_VIPH_INT_EN(x)
#define C_000040_VIPH_INT_EN
#define S_000040_SW_INT_EN(x)
#define G_000040_SW_INT_EN(x)
#define C_000040_SW_INT_EN
#define S_000040_GEYSERVILLE(x)
#define G_000040_GEYSERVILLE(x)
#define C_000040_GEYSERVILLE
#define S_000040_HDCP_AUTHORIZED_INT(x)
#define G_000040_HDCP_AUTHORIZED_INT(x)
#define C_000040_HDCP_AUTHORIZED_INT
#define S_000040_DVI_I2C_INT(x)
#define G_000040_DVI_I2C_INT(x)
#define C_000040_DVI_I2C_INT
#define S_000040_GUIDMA(x)
#define G_000040_GUIDMA(x)
#define C_000040_GUIDMA
#define S_000040_VIDDMA(x)
#define G_000040_VIDDMA(x)
#define C_000040_VIDDMA
#define R_000044_GEN_INT_STATUS
#define S_000044_CRTC_VBLANK_STAT(x)
#define G_000044_CRTC_VBLANK_STAT(x)
#define C_000044_CRTC_VBLANK_STAT
#define S_000044_CRTC_VBLANK_STAT_AK(x)
#define G_000044_CRTC_VBLANK_STAT_AK(x)
#define C_000044_CRTC_VBLANK_STAT_AK
#define S_000044_CRTC_VLINE_STAT(x)
#define G_000044_CRTC_VLINE_STAT(x)
#define C_000044_CRTC_VLINE_STAT
#define S_000044_CRTC_VLINE_STAT_AK(x)
#define G_000044_CRTC_VLINE_STAT_AK(x)
#define C_000044_CRTC_VLINE_STAT_AK
#define S_000044_CRTC_VSYNC_STAT(x)
#define G_000044_CRTC_VSYNC_STAT(x)
#define C_000044_CRTC_VSYNC_STAT
#define S_000044_CRTC_VSYNC_STAT_AK(x)
#define G_000044_CRTC_VSYNC_STAT_AK(x)
#define C_000044_CRTC_VSYNC_STAT_AK
#define S_000044_SNAPSHOT_STAT(x)
#define G_000044_SNAPSHOT_STAT(x)
#define C_000044_SNAPSHOT_STAT
#define S_000044_SNAPSHOT_STAT_AK(x)
#define G_000044_SNAPSHOT_STAT_AK(x)
#define C_000044_SNAPSHOT_STAT_AK
#define S_000044_FP_DETECT_STAT(x)
#define G_000044_FP_DETECT_STAT(x)
#define C_000044_FP_DETECT_STAT
#define S_000044_FP_DETECT_STAT_AK(x)
#define G_000044_FP_DETECT_STAT_AK(x)
#define C_000044_FP_DETECT_STAT_AK
#define S_000044_CRTC2_VLINE_STAT(x)
#define G_000044_CRTC2_VLINE_STAT(x)
#define C_000044_CRTC2_VLINE_STAT
#define S_000044_CRTC2_VLINE_STAT_AK(x)
#define G_000044_CRTC2_VLINE_STAT_AK(x)
#define C_000044_CRTC2_VLINE_STAT_AK
#define S_000044_CRTC2_VSYNC_STAT(x)
#define G_000044_CRTC2_VSYNC_STAT(x)
#define C_000044_CRTC2_VSYNC_STAT
#define S_000044_CRTC2_VSYNC_STAT_AK(x)
#define G_000044_CRTC2_VSYNC_STAT_AK(x)
#define C_000044_CRTC2_VSYNC_STAT_AK
#define S_000044_SNAPSHOT2_STAT(x)
#define G_000044_SNAPSHOT2_STAT(x)
#define C_000044_SNAPSHOT2_STAT
#define S_000044_SNAPSHOT2_STAT_AK(x)
#define G_000044_SNAPSHOT2_STAT_AK(x)
#define C_000044_SNAPSHOT2_STAT_AK
#define S_000044_CAP0_INT_ACTIVE(x)
#define G_000044_CAP0_INT_ACTIVE(x)
#define C_000044_CAP0_INT_ACTIVE
#define S_000044_CRTC2_VBLANK_STAT(x)
#define G_000044_CRTC2_VBLANK_STAT(x)
#define C_000044_CRTC2_VBLANK_STAT
#define S_000044_CRTC2_VBLANK_STAT_AK(x)
#define G_000044_CRTC2_VBLANK_STAT_AK(x)
#define C_000044_CRTC2_VBLANK_STAT_AK
#define S_000044_FP2_DETECT_STAT(x)
#define G_000044_FP2_DETECT_STAT(x)
#define C_000044_FP2_DETECT_STAT
#define S_000044_FP2_DETECT_STAT_AK(x)
#define G_000044_FP2_DETECT_STAT_AK(x)
#define C_000044_FP2_DETECT_STAT_AK
#define S_000044_VSYNC_DIFF_OVER_LIMIT_STAT(x)
#define G_000044_VSYNC_DIFF_OVER_LIMIT_STAT(x)
#define C_000044_VSYNC_DIFF_OVER_LIMIT_STAT
#define S_000044_VSYNC_DIFF_OVER_LIMIT_STAT_AK(x)
#define G_000044_VSYNC_DIFF_OVER_LIMIT_STAT_AK(x)
#define C_000044_VSYNC_DIFF_OVER_LIMIT_STAT_AK
#define S_000044_DMA_VIPH0_INT(x)
#define G_000044_DMA_VIPH0_INT(x)
#define C_000044_DMA_VIPH0_INT
#define S_000044_DMA_VIPH0_INT_AK(x)
#define G_000044_DMA_VIPH0_INT_AK(x)
#define C_000044_DMA_VIPH0_INT_AK
#define S_000044_DMA_VIPH1_INT(x)
#define G_000044_DMA_VIPH1_INT(x)
#define C_000044_DMA_VIPH1_INT
#define S_000044_DMA_VIPH1_INT_AK(x)
#define G_000044_DMA_VIPH1_INT_AK(x)
#define C_000044_DMA_VIPH1_INT_AK
#define S_000044_DMA_VIPH2_INT(x)
#define G_000044_DMA_VIPH2_INT(x)
#define C_000044_DMA_VIPH2_INT
#define S_000044_DMA_VIPH2_INT_AK(x)
#define G_000044_DMA_VIPH2_INT_AK(x)
#define C_000044_DMA_VIPH2_INT_AK
#define S_000044_DMA_VIPH3_INT(x)
#define G_000044_DMA_VIPH3_INT(x)
#define C_000044_DMA_VIPH3_INT
#define S_000044_DMA_VIPH3_INT_AK(x)
#define G_000044_DMA_VIPH3_INT_AK(x)
#define C_000044_DMA_VIPH3_INT_AK
#define S_000044_I2C_INT(x)
#define G_000044_I2C_INT(x)
#define C_000044_I2C_INT
#define S_000044_I2C_INT_AK(x)
#define G_000044_I2C_INT_AK(x)
#define C_000044_I2C_INT_AK
#define S_000044_GUI_IDLE_STAT(x)
#define G_000044_GUI_IDLE_STAT(x)
#define C_000044_GUI_IDLE_STAT
#define S_000044_GUI_IDLE_STAT_AK(x)
#define G_000044_GUI_IDLE_STAT_AK(x)
#define C_000044_GUI_IDLE_STAT_AK
#define S_000044_VIPH_INT(x)
#define G_000044_VIPH_INT(x)
#define C_000044_VIPH_INT
#define S_000044_SW_INT(x)
#define G_000044_SW_INT(x)
#define C_000044_SW_INT
#define S_000044_SW_INT_AK(x)
#define G_000044_SW_INT_AK(x)
#define C_000044_SW_INT_AK
#define S_000044_SW_INT_SET(x)
#define G_000044_SW_INT_SET(x)
#define C_000044_SW_INT_SET
#define S_000044_GEYSERVILLE_STAT(x)
#define G_000044_GEYSERVILLE_STAT(x)
#define C_000044_GEYSERVILLE_STAT
#define S_000044_GEYSERVILLE_STAT_AK(x)
#define G_000044_GEYSERVILLE_STAT_AK(x)
#define C_000044_GEYSERVILLE_STAT_AK
#define S_000044_HDCP_AUTHORIZED_INT_STAT(x)
#define G_000044_HDCP_AUTHORIZED_INT_STAT(x)
#define C_000044_HDCP_AUTHORIZED_INT_STAT
#define S_000044_HDCP_AUTHORIZED_INT_AK(x)
#define G_000044_HDCP_AUTHORIZED_INT_AK(x)
#define C_000044_HDCP_AUTHORIZED_INT_AK
#define S_000044_DVI_I2C_INT_STAT(x)
#define G_000044_DVI_I2C_INT_STAT(x)
#define C_000044_DVI_I2C_INT_STAT
#define S_000044_DVI_I2C_INT_AK(x)
#define G_000044_DVI_I2C_INT_AK(x)
#define C_000044_DVI_I2C_INT_AK
#define S_000044_GUIDMA_STAT(x)
#define G_000044_GUIDMA_STAT(x)
#define C_000044_GUIDMA_STAT
#define S_000044_GUIDMA_AK(x)
#define G_000044_GUIDMA_AK(x)
#define C_000044_GUIDMA_AK
#define S_000044_VIDDMA_STAT(x)
#define G_000044_VIDDMA_STAT(x)
#define C_000044_VIDDMA_STAT
#define S_000044_VIDDMA_AK(x)
#define G_000044_VIDDMA_AK(x)
#define C_000044_VIDDMA_AK
#define R_000050_CRTC_GEN_CNTL
#define S_000050_CRTC_DBL_SCAN_EN(x)
#define G_000050_CRTC_DBL_SCAN_EN(x)
#define C_000050_CRTC_DBL_SCAN_EN
#define S_000050_CRTC_INTERLACE_EN(x)
#define G_000050_CRTC_INTERLACE_EN(x)
#define C_000050_CRTC_INTERLACE_EN
#define S_000050_CRTC_C_SYNC_EN(x)
#define G_000050_CRTC_C_SYNC_EN(x)
#define C_000050_CRTC_C_SYNC_EN
#define S_000050_CRTC_PIX_WIDTH(x)
#define G_000050_CRTC_PIX_WIDTH(x)
#define C_000050_CRTC_PIX_WIDTH
#define S_000050_CRTC_ICON_EN(x)
#define G_000050_CRTC_ICON_EN(x)
#define C_000050_CRTC_ICON_EN
#define S_000050_CRTC_CUR_EN(x)
#define G_000050_CRTC_CUR_EN(x)
#define C_000050_CRTC_CUR_EN
#define S_000050_CRTC_VSTAT_MODE(x)
#define G_000050_CRTC_VSTAT_MODE(x)
#define C_000050_CRTC_VSTAT_MODE
#define S_000050_CRTC_CUR_MODE(x)
#define G_000050_CRTC_CUR_MODE(x)
#define C_000050_CRTC_CUR_MODE
#define S_000050_CRTC_EXT_DISP_EN(x)
#define G_000050_CRTC_EXT_DISP_EN(x)
#define C_000050_CRTC_EXT_DISP_EN
#define S_000050_CRTC_EN(x)
#define G_000050_CRTC_EN(x)
#define C_000050_CRTC_EN
#define S_000050_CRTC_DISP_REQ_EN_B(x)
#define G_000050_CRTC_DISP_REQ_EN_B(x)
#define C_000050_CRTC_DISP_REQ_EN_B
#define R_000054_CRTC_EXT_CNTL
#define S_000054_CRTC_VGA_XOVERSCAN(x)
#define G_000054_CRTC_VGA_XOVERSCAN(x)
#define C_000054_CRTC_VGA_XOVERSCAN
#define S_000054_VGA_BLINK_RATE(x)
#define G_000054_VGA_BLINK_RATE(x)
#define C_000054_VGA_BLINK_RATE
#define S_000054_VGA_ATI_LINEAR(x)
#define G_000054_VGA_ATI_LINEAR(x)
#define C_000054_VGA_ATI_LINEAR
#define S_000054_VGA_128KAP_PAGING(x)
#define G_000054_VGA_128KAP_PAGING(x)
#define C_000054_VGA_128KAP_PAGING
#define S_000054_VGA_TEXT_132(x)
#define G_000054_VGA_TEXT_132(x)
#define C_000054_VGA_TEXT_132
#define S_000054_VGA_XCRT_CNT_EN(x)
#define G_000054_VGA_XCRT_CNT_EN(x)
#define C_000054_VGA_XCRT_CNT_EN
#define S_000054_CRTC_HSYNC_DIS(x)
#define G_000054_CRTC_HSYNC_DIS(x)
#define C_000054_CRTC_HSYNC_DIS
#define S_000054_CRTC_VSYNC_DIS(x)
#define G_000054_CRTC_VSYNC_DIS(x)
#define C_000054_CRTC_VSYNC_DIS
#define S_000054_CRTC_DISPLAY_DIS(x)
#define G_000054_CRTC_DISPLAY_DIS(x)
#define C_000054_CRTC_DISPLAY_DIS
#define S_000054_CRTC_SYNC_TRISTATE(x)
#define G_000054_CRTC_SYNC_TRISTATE(x)
#define C_000054_CRTC_SYNC_TRISTATE
#define S_000054_CRTC_HSYNC_TRISTATE(x)
#define G_000054_CRTC_HSYNC_TRISTATE(x)
#define C_000054_CRTC_HSYNC_TRISTATE
#define S_000054_CRTC_VSYNC_TRISTATE(x)
#define G_000054_CRTC_VSYNC_TRISTATE(x)
#define C_000054_CRTC_VSYNC_TRISTATE
#define S_000054_CRT_ON(x)
#define G_000054_CRT_ON(x)
#define C_000054_CRT_ON
#define S_000054_VGA_CUR_B_TEST(x)
#define G_000054_VGA_CUR_B_TEST(x)
#define C_000054_VGA_CUR_B_TEST
#define S_000054_VGA_PACK_DIS(x)
#define G_000054_VGA_PACK_DIS(x)
#define C_000054_VGA_PACK_DIS
#define S_000054_VGA_MEM_PS_EN(x)
#define G_000054_VGA_MEM_PS_EN(x)
#define C_000054_VGA_MEM_PS_EN
#define S_000054_VCRTC_IDX_MASTER(x)
#define G_000054_VCRTC_IDX_MASTER(x)
#define C_000054_VCRTC_IDX_MASTER
#define R_000148_MC_FB_LOCATION
#define S_000148_MC_FB_START(x)
#define G_000148_MC_FB_START(x)
#define C_000148_MC_FB_START
#define S_000148_MC_FB_TOP(x)
#define G_000148_MC_FB_TOP(x)
#define C_000148_MC_FB_TOP
#define R_00014C_MC_AGP_LOCATION
#define S_00014C_MC_AGP_START(x)
#define G_00014C_MC_AGP_START(x)
#define C_00014C_MC_AGP_START
#define S_00014C_MC_AGP_TOP(x)
#define G_00014C_MC_AGP_TOP(x)
#define C_00014C_MC_AGP_TOP
#define R_000170_AGP_BASE
#define S_000170_AGP_BASE_ADDR(x)
#define G_000170_AGP_BASE_ADDR(x)
#define C_000170_AGP_BASE_ADDR
#define R_00023C_DISPLAY_BASE_ADDR
#define S_00023C_DISPLAY_BASE_ADDR(x)
#define G_00023C_DISPLAY_BASE_ADDR(x)
#define C_00023C_DISPLAY_BASE_ADDR
#define R_000260_CUR_OFFSET
#define S_000260_CUR_OFFSET(x)
#define G_000260_CUR_OFFSET(x)
#define C_000260_CUR_OFFSET
#define S_000260_CUR_LOCK(x)
#define G_000260_CUR_LOCK(x)
#define C_000260_CUR_LOCK
#define R_00033C_CRTC2_DISPLAY_BASE_ADDR
#define S_00033C_CRTC2_DISPLAY_BASE_ADDR(x)
#define G_00033C_CRTC2_DISPLAY_BASE_ADDR(x)
#define C_00033C_CRTC2_DISPLAY_BASE_ADDR
#define R_000360_CUR2_OFFSET
#define S_000360_CUR2_OFFSET(x)
#define G_000360_CUR2_OFFSET(x)
#define C_000360_CUR2_OFFSET
#define S_000360_CUR2_LOCK(x)
#define G_000360_CUR2_LOCK(x)
#define C_000360_CUR2_LOCK
#define R_0003C2_GENMO_WT
#define S_0003C2_GENMO_MONO_ADDRESS_B(x)
#define G_0003C2_GENMO_MONO_ADDRESS_B(x)
#define C_0003C2_GENMO_MONO_ADDRESS_B
#define S_0003C2_VGA_RAM_EN(x)
#define G_0003C2_VGA_RAM_EN(x)
#define C_0003C2_VGA_RAM_EN
#define S_0003C2_VGA_CKSEL(x)
#define G_0003C2_VGA_CKSEL(x)
#define C_0003C2_VGA_CKSEL
#define S_0003C2_ODD_EVEN_MD_PGSEL(x)
#define G_0003C2_ODD_EVEN_MD_PGSEL(x)
#define C_0003C2_ODD_EVEN_MD_PGSEL
#define S_0003C2_VGA_HSYNC_POL(x)
#define G_0003C2_VGA_HSYNC_POL(x)
#define C_0003C2_VGA_HSYNC_POL
#define S_0003C2_VGA_VSYNC_POL(x)
#define G_0003C2_VGA_VSYNC_POL(x)
#define C_0003C2_VGA_VSYNC_POL
#define R_0003F8_CRTC2_GEN_CNTL
#define S_0003F8_CRTC2_DBL_SCAN_EN(x)
#define G_0003F8_CRTC2_DBL_SCAN_EN(x)
#define C_0003F8_CRTC2_DBL_SCAN_EN
#define S_0003F8_CRTC2_INTERLACE_EN(x)
#define G_0003F8_CRTC2_INTERLACE_EN(x)
#define C_0003F8_CRTC2_INTERLACE_EN
#define S_0003F8_CRTC2_SYNC_TRISTATE(x)
#define G_0003F8_CRTC2_SYNC_TRISTATE(x)
#define C_0003F8_CRTC2_SYNC_TRISTATE
#define S_0003F8_CRTC2_HSYNC_TRISTATE(x)
#define G_0003F8_CRTC2_HSYNC_TRISTATE(x)
#define C_0003F8_CRTC2_HSYNC_TRISTATE
#define S_0003F8_CRTC2_VSYNC_TRISTATE(x)
#define G_0003F8_CRTC2_VSYNC_TRISTATE(x)
#define C_0003F8_CRTC2_VSYNC_TRISTATE
#define S_0003F8_CRT2_ON(x)
#define G_0003F8_CRT2_ON(x)
#define C_0003F8_CRT2_ON
#define S_0003F8_CRTC2_PIX_WIDTH(x)
#define G_0003F8_CRTC2_PIX_WIDTH(x)
#define C_0003F8_CRTC2_PIX_WIDTH
#define S_0003F8_CRTC2_ICON_EN(x)
#define G_0003F8_CRTC2_ICON_EN(x)
#define C_0003F8_CRTC2_ICON_EN
#define S_0003F8_CRTC2_CUR_EN(x)
#define G_0003F8_CRTC2_CUR_EN(x)
#define C_0003F8_CRTC2_CUR_EN
#define S_0003F8_CRTC2_CUR_MODE(x)
#define G_0003F8_CRTC2_CUR_MODE(x)
#define C_0003F8_CRTC2_CUR_MODE
#define S_0003F8_CRTC2_DISPLAY_DIS(x)
#define G_0003F8_CRTC2_DISPLAY_DIS(x)
#define C_0003F8_CRTC2_DISPLAY_DIS
#define S_0003F8_CRTC2_EN(x)
#define G_0003F8_CRTC2_EN(x)
#define C_0003F8_CRTC2_EN
#define S_0003F8_CRTC2_DISP_REQ_EN_B(x)
#define G_0003F8_CRTC2_DISP_REQ_EN_B(x)
#define C_0003F8_CRTC2_DISP_REQ_EN_B
#define S_0003F8_CRTC2_C_SYNC_EN(x)
#define G_0003F8_CRTC2_C_SYNC_EN(x)
#define C_0003F8_CRTC2_C_SYNC_EN
#define S_0003F8_CRTC2_HSYNC_DIS(x)
#define G_0003F8_CRTC2_HSYNC_DIS(x)
#define C_0003F8_CRTC2_HSYNC_DIS
#define S_0003F8_CRTC2_VSYNC_DIS(x)
#define G_0003F8_CRTC2_VSYNC_DIS(x)
#define C_0003F8_CRTC2_VSYNC_DIS
#define R_000420_OV0_SCALE_CNTL
#define S_000420_OV0_NO_READ_BEHIND_SCAN(x)
#define G_000420_OV0_NO_READ_BEHIND_SCAN(x)
#define C_000420_OV0_NO_READ_BEHIND_SCAN
#define S_000420_OV0_HORZ_PICK_NEAREST(x)
#define G_000420_OV0_HORZ_PICK_NEAREST(x)
#define C_000420_OV0_HORZ_PICK_NEAREST
#define S_000420_OV0_VERT_PICK_NEAREST(x)
#define G_000420_OV0_VERT_PICK_NEAREST(x)
#define C_000420_OV0_VERT_PICK_NEAREST
#define S_000420_OV0_SIGNED_UV(x)
#define G_000420_OV0_SIGNED_UV(x)
#define C_000420_OV0_SIGNED_UV
#define S_000420_OV0_GAMMA_SEL(x)
#define G_000420_OV0_GAMMA_SEL(x)
#define C_000420_OV0_GAMMA_SEL
#define S_000420_OV0_SURFACE_FORMAT(x)
#define G_000420_OV0_SURFACE_FORMAT(x)
#define C_000420_OV0_SURFACE_FORMAT
#define S_000420_OV0_ADAPTIVE_DEINT(x)
#define G_000420_OV0_ADAPTIVE_DEINT(x)
#define C_000420_OV0_ADAPTIVE_DEINT
#define S_000420_OV0_CRTC_SEL(x)
#define G_000420_OV0_CRTC_SEL(x)
#define C_000420_OV0_CRTC_SEL
#define S_000420_OV0_BURST_PER_PLANE(x)
#define G_000420_OV0_BURST_PER_PLANE(x)
#define C_000420_OV0_BURST_PER_PLANE
#define S_000420_OV0_DOUBLE_BUFFER_REGS(x)
#define G_000420_OV0_DOUBLE_BUFFER_REGS(x)
#define C_000420_OV0_DOUBLE_BUFFER_REGS
#define S_000420_OV0_BANDWIDTH(x)
#define G_000420_OV0_BANDWIDTH(x)
#define C_000420_OV0_BANDWIDTH
#define S_000420_OV0_LIN_TRANS_BYPASS(x)
#define G_000420_OV0_LIN_TRANS_BYPASS(x)
#define C_000420_OV0_LIN_TRANS_BYPASS
#define S_000420_OV0_INT_EMU(x)
#define G_000420_OV0_INT_EMU(x)
#define C_000420_OV0_INT_EMU
#define S_000420_OV0_OVERLAY_EN(x)
#define G_000420_OV0_OVERLAY_EN(x)
#define C_000420_OV0_OVERLAY_EN
#define S_000420_OV0_SOFT_RESET(x)
#define G_000420_OV0_SOFT_RESET(x)
#define C_000420_OV0_SOFT_RESET
#define R_00070C_CP_RB_RPTR_ADDR
#define S_00070C_RB_RPTR_SWAP(x)
#define G_00070C_RB_RPTR_SWAP(x)
#define C_00070C_RB_RPTR_SWAP
#define S_00070C_RB_RPTR_ADDR(x)
#define G_00070C_RB_RPTR_ADDR(x)
#define C_00070C_RB_RPTR_ADDR
#define R_000740_CP_CSQ_CNTL
#define S_000740_CSQ_CNT_PRIMARY(x)
#define G_000740_CSQ_CNT_PRIMARY(x)
#define C_000740_CSQ_CNT_PRIMARY
#define S_000740_CSQ_CNT_INDIRECT(x)
#define G_000740_CSQ_CNT_INDIRECT(x)
#define C_000740_CSQ_CNT_INDIRECT
#define S_000740_CSQ_MODE(x)
#define G_000740_CSQ_MODE(x)
#define C_000740_CSQ_MODE
#define R_000770_SCRATCH_UMSK
#define S_000770_SCRATCH_UMSK(x)
#define G_000770_SCRATCH_UMSK(x)
#define C_000770_SCRATCH_UMSK
#define S_000770_SCRATCH_SWAP(x)
#define G_000770_SCRATCH_SWAP(x)
#define C_000770_SCRATCH_SWAP
#define R_000774_SCRATCH_ADDR
#define S_000774_SCRATCH_ADDR(x)
#define G_000774_SCRATCH_ADDR(x)
#define C_000774_SCRATCH_ADDR
#define R_0007C0_CP_STAT
#define S_0007C0_MRU_BUSY(x)
#define G_0007C0_MRU_BUSY(x)
#define C_0007C0_MRU_BUSY
#define S_0007C0_MWU_BUSY(x)
#define G_0007C0_MWU_BUSY(x)
#define C_0007C0_MWU_BUSY
#define S_0007C0_RSIU_BUSY(x)
#define G_0007C0_RSIU_BUSY(x)
#define C_0007C0_RSIU_BUSY
#define S_0007C0_RCIU_BUSY(x)
#define G_0007C0_RCIU_BUSY(x)
#define C_0007C0_RCIU_BUSY
#define S_0007C0_CSF_PRIMARY_BUSY(x)
#define G_0007C0_CSF_PRIMARY_BUSY(x)
#define C_0007C0_CSF_PRIMARY_BUSY
#define S_0007C0_CSF_INDIRECT_BUSY(x)
#define G_0007C0_CSF_INDIRECT_BUSY(x)
#define C_0007C0_CSF_INDIRECT_BUSY
#define S_0007C0_CSQ_PRIMARY_BUSY(x)
#define G_0007C0_CSQ_PRIMARY_BUSY(x)
#define C_0007C0_CSQ_PRIMARY_BUSY
#define S_0007C0_CSQ_INDIRECT_BUSY(x)
#define G_0007C0_CSQ_INDIRECT_BUSY(x)
#define C_0007C0_CSQ_INDIRECT_BUSY
#define S_0007C0_CSI_BUSY(x)
#define G_0007C0_CSI_BUSY(x)
#define C_0007C0_CSI_BUSY
#define S_0007C0_GUIDMA_BUSY(x)
#define G_0007C0_GUIDMA_BUSY(x)
#define C_0007C0_GUIDMA_BUSY
#define S_0007C0_VIDDMA_BUSY(x)
#define G_0007C0_VIDDMA_BUSY(x)
#define C_0007C0_VIDDMA_BUSY
#define S_0007C0_CMDSTRM_BUSY(x)
#define G_0007C0_CMDSTRM_BUSY(x)
#define C_0007C0_CMDSTRM_BUSY
#define S_0007C0_CP_BUSY(x)
#define G_0007C0_CP_BUSY(x)
#define C_0007C0_CP_BUSY
#define R_000E40_RBBM_STATUS
#define S_000E40_CMDFIFO_AVAIL(x)
#define G_000E40_CMDFIFO_AVAIL(x)
#define C_000E40_CMDFIFO_AVAIL
#define S_000E40_HIRQ_ON_RBB(x)
#define G_000E40_HIRQ_ON_RBB(x)
#define C_000E40_HIRQ_ON_RBB
#define S_000E40_CPRQ_ON_RBB(x)
#define G_000E40_CPRQ_ON_RBB(x)
#define C_000E40_CPRQ_ON_RBB
#define S_000E40_CFRQ_ON_RBB(x)
#define G_000E40_CFRQ_ON_RBB(x)
#define C_000E40_CFRQ_ON_RBB
#define S_000E40_HIRQ_IN_RTBUF(x)
#define G_000E40_HIRQ_IN_RTBUF(x)
#define C_000E40_HIRQ_IN_RTBUF
#define S_000E40_CPRQ_IN_RTBUF(x)
#define G_000E40_CPRQ_IN_RTBUF(x)
#define C_000E40_CPRQ_IN_RTBUF
#define S_000E40_CFRQ_IN_RTBUF(x)
#define G_000E40_CFRQ_IN_RTBUF(x)
#define C_000E40_CFRQ_IN_RTBUF
#define S_000E40_CF_PIPE_BUSY(x)
#define G_000E40_CF_PIPE_BUSY(x)
#define C_000E40_CF_PIPE_BUSY
#define S_000E40_ENG_EV_BUSY(x)
#define G_000E40_ENG_EV_BUSY(x)
#define C_000E40_ENG_EV_BUSY
#define S_000E40_CP_CMDSTRM_BUSY(x)
#define G_000E40_CP_CMDSTRM_BUSY(x)
#define C_000E40_CP_CMDSTRM_BUSY
#define S_000E40_E2_BUSY(x)
#define G_000E40_E2_BUSY(x)
#define C_000E40_E2_BUSY
#define S_000E40_RB2D_BUSY(x)
#define G_000E40_RB2D_BUSY(x)
#define C_000E40_RB2D_BUSY
#define S_000E40_RB3D_BUSY(x)
#define G_000E40_RB3D_BUSY(x)
#define C_000E40_RB3D_BUSY
#define S_000E40_SE_BUSY(x)
#define G_000E40_SE_BUSY(x)
#define C_000E40_SE_BUSY
#define S_000E40_RE_BUSY(x)
#define G_000E40_RE_BUSY(x)
#define C_000E40_RE_BUSY
#define S_000E40_TAM_BUSY(x)
#define G_000E40_TAM_BUSY(x)
#define C_000E40_TAM_BUSY
#define S_000E40_TDM_BUSY(x)
#define G_000E40_TDM_BUSY(x)
#define C_000E40_TDM_BUSY
#define S_000E40_PB_BUSY(x)
#define G_000E40_PB_BUSY(x)
#define C_000E40_PB_BUSY
#define S_000E40_GUI_ACTIVE(x)
#define G_000E40_GUI_ACTIVE(x)
#define C_000E40_GUI_ACTIVE


#define R_00000D_SCLK_CNTL
#define S_00000D_SCLK_SRC_SEL(x)
#define G_00000D_SCLK_SRC_SEL(x)
#define C_00000D_SCLK_SRC_SEL
#define S_00000D_TCLK_SRC_SEL(x)
#define G_00000D_TCLK_SRC_SEL(x)
#define C_00000D_TCLK_SRC_SEL
#define S_00000D_FORCE_CP(x)
#define G_00000D_FORCE_CP(x)
#define C_00000D_FORCE_CP
#define S_00000D_FORCE_HDP(x)
#define G_00000D_FORCE_HDP(x)
#define C_00000D_FORCE_HDP
#define S_00000D_FORCE_DISP(x)
#define G_00000D_FORCE_DISP(x)
#define C_00000D_FORCE_DISP
#define S_00000D_FORCE_TOP(x)
#define G_00000D_FORCE_TOP(x)
#define C_00000D_FORCE_TOP
#define S_00000D_FORCE_E2(x)
#define G_00000D_FORCE_E2(x)
#define C_00000D_FORCE_E2
#define S_00000D_FORCE_SE(x)
#define G_00000D_FORCE_SE(x)
#define C_00000D_FORCE_SE
#define S_00000D_FORCE_IDCT(x)
#define G_00000D_FORCE_IDCT(x)
#define C_00000D_FORCE_IDCT
#define S_00000D_FORCE_VIP(x)
#define G_00000D_FORCE_VIP(x)
#define C_00000D_FORCE_VIP
#define S_00000D_FORCE_RE(x)
#define G_00000D_FORCE_RE(x)
#define C_00000D_FORCE_RE
#define S_00000D_FORCE_PB(x)
#define G_00000D_FORCE_PB(x)
#define C_00000D_FORCE_PB
#define S_00000D_FORCE_TAM(x)
#define G_00000D_FORCE_TAM(x)
#define C_00000D_FORCE_TAM
#define S_00000D_FORCE_TDM(x)
#define G_00000D_FORCE_TDM(x)
#define C_00000D_FORCE_TDM
#define S_00000D_FORCE_RB(x)
#define G_00000D_FORCE_RB(x)
#define C_00000D_FORCE_RB

/* PLL regs */
#define SCLK_CNTL
#define FORCE_HDP
#define CLK_PWRMGT_CNTL
#define GLOBAL_PMAN_EN
#define DISP_PM
#define PLL_PWRMGT_CNTL
#define MPLL_TURNOFF
#define SPLL_TURNOFF
#define PPLL_TURNOFF
#define P2PLL_TURNOFF
#define TVPLL_TURNOFF
#define MOBILE_SU
#define SU_SCLK_USE_BCLK
#define SCLK_CNTL2
#define REDUCED_SPEED_SCLK_MODE
#define REDUCED_SPEED_SCLK_SEL(x)
#define MCLK_MISC
#define EN_MCLK_TRISTATE_IN_SUSPEND
#define SCLK_MORE_CNTL
#define REDUCED_SPEED_SCLK_EN
#define IO_CG_VOLTAGE_DROP
#define VOLTAGE_DELAY_SEL(x)
#define VOLTAGE_DROP_SYNC

/* mmreg */
#define DISP_PWR_MAN
#define DISP_D3_GRPH_RST
#define DISP_D3_SUBPIC_RST
#define DISP_D3_OV0_RST
#define DISP_D1D2_GRPH_RST
#define DISP_D1D2_SUBPIC_RST
#define DISP_D1D2_OV0_RST
#define DISP_DVO_ENABLE_RST
#define TV_ENABLE_RST
#define AUTO_PWRUP_EN

#endif