/* * Copyright 2008 Advanced Micro Devices, Inc. * Copyright 2008 Red Hat Inc. * Copyright 2009 Jerome Glisse. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Dave Airlie * Alex Deucher * Jerome Glisse */ #ifndef __RV515D_H__ #define __RV515D_H__ /* * RV515 registers */ #define PCIE_INDEX … #define PCIE_DATA … #define MC_IND_INDEX … #define MC_IND_WR_EN … #define MC_IND_DATA … #define RBBM_SOFT_RESET … #define CONFIG_MEMSIZE … #define HDP_FB_LOCATION … #define CP_CSQ_CNTL … #define CP_CSQ_MODE … #define CP_CSQ_ADDR … #define CP_CSQ_DATA … #define CP_CSQ_STAT … #define CP_CSQ2_STAT … #define RBBM_STATUS … #define DST_PIPE_CONFIG … #define WAIT_UNTIL … #define WAIT_2D_IDLE … #define WAIT_3D_IDLE … #define WAIT_2D_IDLECLEAN … #define WAIT_3D_IDLECLEAN … #define ISYNC_CNTL … #define ISYNC_ANY2D_IDLE3D … #define ISYNC_ANY3D_IDLE2D … #define ISYNC_TRIG2D_IDLE3D … #define ISYNC_TRIG3D_IDLE2D … #define ISYNC_WAIT_IDLEGUI … #define ISYNC_CPSCRATCH_IDLEGUI … #define VAP_INDEX_OFFSET … #define VAP_PVS_STATE_FLUSH_REG … #define GB_ENABLE … #define GB_MSPOS0 … #define MS_X0_SHIFT … #define MS_Y0_SHIFT … #define MS_X1_SHIFT … #define MS_Y1_SHIFT … #define MS_X2_SHIFT … #define MS_Y2_SHIFT … #define MSBD0_Y_SHIFT … #define MSBD0_X_SHIFT … #define GB_MSPOS1 … #define MS_X3_SHIFT … #define MS_Y3_SHIFT … #define MS_X4_SHIFT … #define MS_Y4_SHIFT … #define MS_X5_SHIFT … #define MS_Y5_SHIFT … #define MSBD1_SHIFT … #define GB_TILE_CONFIG … #define ENABLE_TILING … #define PIPE_COUNT_MASK … #define PIPE_COUNT_SHIFT … #define TILE_SIZE_8 … #define TILE_SIZE_16 … #define TILE_SIZE_32 … #define SUBPIXEL_1_12 … #define SUBPIXEL_1_16 … #define GB_SELECT … #define GB_AA_CONFIG … #define GB_PIPE_SELECT … #define GA_ENHANCE … #define GA_DEADLOCK_CNTL … #define GA_FASTSYNC_CNTL … #define GA_POLY_MODE … #define FRONT_PTYPE_POINT … #define FRONT_PTYPE_LINE … #define FRONT_PTYPE_TRIANGE … #define BACK_PTYPE_POINT … #define BACK_PTYPE_LINE … #define BACK_PTYPE_TRIANGE … #define GA_ROUND_MODE … #define GEOMETRY_ROUND_TRUNC … #define GEOMETRY_ROUND_NEAREST … #define COLOR_ROUND_TRUNC … #define COLOR_ROUND_NEAREST … #define SU_REG_DEST … #define RB3D_DSTCACHE_CTLSTAT … #define RB3D_DC_FLUSH … #define RB3D_DC_FREE … #define RB3D_DC_FINISH … #define ZB_ZCACHE_CTLSTAT … #define ZC_FLUSH … #define ZC_FREE … #define DC_LB_MEMORY_SPLIT … #define DC_LB_MEMORY_SPLIT_MASK … #define DC_LB_MEMORY_SPLIT_SHIFT … #define DC_LB_MEMORY_SPLIT_D1HALF_D2HALF … #define DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q … #define DC_LB_MEMORY_SPLIT_D1_ONLY … #define DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q … #define DC_LB_MEMORY_SPLIT_SHIFT_MODE … #define DC_LB_DISP1_END_ADR_SHIFT … #define DC_LB_DISP1_END_ADR_MASK … #define D1MODE_PRIORITY_A_CNT … #define MODE_PRIORITY_MARK_MASK … #define MODE_PRIORITY_OFF … #define MODE_PRIORITY_ALWAYS_ON … #define MODE_PRIORITY_FORCE_MASK … #define D1MODE_PRIORITY_B_CNT … #define LB_MAX_REQ_OUTSTANDING … #define LB_D1_MAX_REQ_OUTSTANDING_MASK … #define LB_D1_MAX_REQ_OUTSTANDING_SHIFT … #define LB_D2_MAX_REQ_OUTSTANDING_MASK … #define LB_D2_MAX_REQ_OUTSTANDING_SHIFT … #define D2MODE_PRIORITY_A_CNT … #define D2MODE_PRIORITY_B_CNT … /* ix[MC] registers */ #define MC_FB_LOCATION … #define MC_FB_START_MASK … #define MC_FB_START_SHIFT … #define MC_FB_TOP_MASK … #define MC_FB_TOP_SHIFT … #define MC_AGP_LOCATION … #define MC_AGP_START_MASK … #define MC_AGP_START_SHIFT … #define MC_AGP_TOP_MASK … #define MC_AGP_TOP_SHIFT … #define MC_AGP_BASE … #define MC_AGP_BASE_2 … #define MC_CNTL … #define MEM_NUM_CHANNELS_MASK … #define MC_STATUS … #define MC_STATUS_IDLE … #define MC_MISC_LAT_TIMER … #define MC_CPR_INIT_LAT_MASK … #define MC_VF_INIT_LAT_MASK … #define MC_DISP0R_INIT_LAT_MASK … #define MC_DISP0R_INIT_LAT_SHIFT … #define MC_DISP1R_INIT_LAT_MASK … #define MC_DISP1R_INIT_LAT_SHIFT … #define MC_FIXED_INIT_LAT_MASK … #define MC_E2R_INIT_LAT_MASK … #define SAME_PAGE_PRIO_MASK … #define MC_GLOBW_INIT_LAT_MASK … /* * PM4 packet */ #define CP_PACKET0 … #define PACKET0_BASE_INDEX_SHIFT … #define PACKET0_BASE_INDEX_MASK … #define PACKET0_COUNT_SHIFT … #define PACKET0_COUNT_MASK … #define CP_PACKET1 … #define CP_PACKET2 … #define PACKET2_PAD_SHIFT … #define PACKET2_PAD_MASK … #define CP_PACKET3 … #define PACKET3_IT_OPCODE_SHIFT … #define PACKET3_IT_OPCODE_MASK … #define PACKET3_COUNT_SHIFT … #define PACKET3_COUNT_MASK … /* PACKET3 op code */ #define PACKET3_NOP … #define PACKET3_3D_DRAW_VBUF … #define PACKET3_3D_DRAW_IMMD … #define PACKET3_3D_DRAW_INDX … #define PACKET3_3D_LOAD_VBPNTR … #define PACKET3_INDX_BUFFER … #define PACKET3_3D_DRAW_VBUF_2 … #define PACKET3_3D_DRAW_IMMD_2 … #define PACKET3_3D_DRAW_INDX_2 … #define PACKET3_BITBLT_MULTI … #define PACKET0(reg, n) … #define PACKET2(v) … #define PACKET3(op, n) … /* Registers */ #define R_0000F0_RBBM_SOFT_RESET … #define S_0000F0_SOFT_RESET_CP(x) … #define G_0000F0_SOFT_RESET_CP(x) … #define C_0000F0_SOFT_RESET_CP … #define S_0000F0_SOFT_RESET_HI(x) … #define G_0000F0_SOFT_RESET_HI(x) … #define C_0000F0_SOFT_RESET_HI … #define S_0000F0_SOFT_RESET_VAP(x) … #define G_0000F0_SOFT_RESET_VAP(x) … #define C_0000F0_SOFT_RESET_VAP … #define S_0000F0_SOFT_RESET_RE(x) … #define G_0000F0_SOFT_RESET_RE(x) … #define C_0000F0_SOFT_RESET_RE … #define S_0000F0_SOFT_RESET_PP(x) … #define G_0000F0_SOFT_RESET_PP(x) … #define C_0000F0_SOFT_RESET_PP … #define S_0000F0_SOFT_RESET_E2(x) … #define G_0000F0_SOFT_RESET_E2(x) … #define C_0000F0_SOFT_RESET_E2 … #define S_0000F0_SOFT_RESET_RB(x) … #define G_0000F0_SOFT_RESET_RB(x) … #define C_0000F0_SOFT_RESET_RB … #define S_0000F0_SOFT_RESET_HDP(x) … #define G_0000F0_SOFT_RESET_HDP(x) … #define C_0000F0_SOFT_RESET_HDP … #define S_0000F0_SOFT_RESET_MC(x) … #define G_0000F0_SOFT_RESET_MC(x) … #define C_0000F0_SOFT_RESET_MC … #define S_0000F0_SOFT_RESET_AIC(x) … #define G_0000F0_SOFT_RESET_AIC(x) … #define C_0000F0_SOFT_RESET_AIC … #define S_0000F0_SOFT_RESET_VIP(x) … #define G_0000F0_SOFT_RESET_VIP(x) … #define C_0000F0_SOFT_RESET_VIP … #define S_0000F0_SOFT_RESET_DISP(x) … #define G_0000F0_SOFT_RESET_DISP(x) … #define C_0000F0_SOFT_RESET_DISP … #define S_0000F0_SOFT_RESET_CG(x) … #define G_0000F0_SOFT_RESET_CG(x) … #define C_0000F0_SOFT_RESET_CG … #define S_0000F0_SOFT_RESET_GA(x) … #define G_0000F0_SOFT_RESET_GA(x) … #define C_0000F0_SOFT_RESET_GA … #define S_0000F0_SOFT_RESET_IDCT(x) … #define G_0000F0_SOFT_RESET_IDCT(x) … #define C_0000F0_SOFT_RESET_IDCT … #define R_0000F8_CONFIG_MEMSIZE … #define S_0000F8_CONFIG_MEMSIZE(x) … #define G_0000F8_CONFIG_MEMSIZE(x) … #define C_0000F8_CONFIG_MEMSIZE … #define R_000134_HDP_FB_LOCATION … #define S_000134_HDP_FB_START(x) … #define G_000134_HDP_FB_START(x) … #define C_000134_HDP_FB_START … #define R_000300_VGA_RENDER_CONTROL … #define S_000300_VGA_BLINK_RATE(x) … #define G_000300_VGA_BLINK_RATE(x) … #define C_000300_VGA_BLINK_RATE … #define S_000300_VGA_BLINK_MODE(x) … #define G_000300_VGA_BLINK_MODE(x) … #define C_000300_VGA_BLINK_MODE … #define S_000300_VGA_CURSOR_BLINK_INVERT(x) … #define G_000300_VGA_CURSOR_BLINK_INVERT(x) … #define C_000300_VGA_CURSOR_BLINK_INVERT … #define S_000300_VGA_EXTD_ADDR_COUNT_ENABLE(x) … #define G_000300_VGA_EXTD_ADDR_COUNT_ENABLE(x) … #define C_000300_VGA_EXTD_ADDR_COUNT_ENABLE … #define S_000300_VGA_VSTATUS_CNTL(x) … #define G_000300_VGA_VSTATUS_CNTL(x) … #define C_000300_VGA_VSTATUS_CNTL … #define S_000300_VGA_LOCK_8DOT(x) … #define G_000300_VGA_LOCK_8DOT(x) … #define C_000300_VGA_LOCK_8DOT … #define S_000300_VGAREG_LINECMP_COMPATIBILITY_SEL(x) … #define G_000300_VGAREG_LINECMP_COMPATIBILITY_SEL(x) … #define C_000300_VGAREG_LINECMP_COMPATIBILITY_SEL … #define R_000310_VGA_MEMORY_BASE_ADDRESS … #define S_000310_VGA_MEMORY_BASE_ADDRESS(x) … #define G_000310_VGA_MEMORY_BASE_ADDRESS(x) … #define C_000310_VGA_MEMORY_BASE_ADDRESS … #define R_000328_VGA_HDP_CONTROL … #define S_000328_VGA_MEM_PAGE_SELECT_EN(x) … #define G_000328_VGA_MEM_PAGE_SELECT_EN(x) … #define C_000328_VGA_MEM_PAGE_SELECT_EN … #define S_000328_VGA_RBBM_LOCK_DISABLE(x) … #define G_000328_VGA_RBBM_LOCK_DISABLE(x) … #define C_000328_VGA_RBBM_LOCK_DISABLE … #define S_000328_VGA_SOFT_RESET(x) … #define G_000328_VGA_SOFT_RESET(x) … #define C_000328_VGA_SOFT_RESET … #define S_000328_VGA_TEST_RESET_CONTROL(x) … #define G_000328_VGA_TEST_RESET_CONTROL(x) … #define C_000328_VGA_TEST_RESET_CONTROL … #define R_000330_D1VGA_CONTROL … #define S_000330_D1VGA_MODE_ENABLE(x) … #define G_000330_D1VGA_MODE_ENABLE(x) … #define C_000330_D1VGA_MODE_ENABLE … #define S_000330_D1VGA_TIMING_SELECT(x) … #define G_000330_D1VGA_TIMING_SELECT(x) … #define C_000330_D1VGA_TIMING_SELECT … #define S_000330_D1VGA_SYNC_POLARITY_SELECT(x) … #define G_000330_D1VGA_SYNC_POLARITY_SELECT(x) … #define C_000330_D1VGA_SYNC_POLARITY_SELECT … #define S_000330_D1VGA_OVERSCAN_TIMING_SELECT(x) … #define G_000330_D1VGA_OVERSCAN_TIMING_SELECT(x) … #define C_000330_D1VGA_OVERSCAN_TIMING_SELECT … #define S_000330_D1VGA_OVERSCAN_COLOR_EN(x) … #define G_000330_D1VGA_OVERSCAN_COLOR_EN(x) … #define C_000330_D1VGA_OVERSCAN_COLOR_EN … #define S_000330_D1VGA_ROTATE(x) … #define G_000330_D1VGA_ROTATE(x) … #define C_000330_D1VGA_ROTATE … #define R_000338_D2VGA_CONTROL … #define S_000338_D2VGA_MODE_ENABLE(x) … #define G_000338_D2VGA_MODE_ENABLE(x) … #define C_000338_D2VGA_MODE_ENABLE … #define S_000338_D2VGA_TIMING_SELECT(x) … #define G_000338_D2VGA_TIMING_SELECT(x) … #define C_000338_D2VGA_TIMING_SELECT … #define S_000338_D2VGA_SYNC_POLARITY_SELECT(x) … #define G_000338_D2VGA_SYNC_POLARITY_SELECT(x) … #define C_000338_D2VGA_SYNC_POLARITY_SELECT … #define S_000338_D2VGA_OVERSCAN_TIMING_SELECT(x) … #define G_000338_D2VGA_OVERSCAN_TIMING_SELECT(x) … #define C_000338_D2VGA_OVERSCAN_TIMING_SELECT … #define S_000338_D2VGA_OVERSCAN_COLOR_EN(x) … #define G_000338_D2VGA_OVERSCAN_COLOR_EN(x) … #define C_000338_D2VGA_OVERSCAN_COLOR_EN … #define S_000338_D2VGA_ROTATE(x) … #define G_000338_D2VGA_ROTATE(x) … #define C_000338_D2VGA_ROTATE … #define R_0007C0_CP_STAT … #define S_0007C0_MRU_BUSY(x) … #define G_0007C0_MRU_BUSY(x) … #define C_0007C0_MRU_BUSY … #define S_0007C0_MWU_BUSY(x) … #define G_0007C0_MWU_BUSY(x) … #define C_0007C0_MWU_BUSY … #define S_0007C0_RSIU_BUSY(x) … #define G_0007C0_RSIU_BUSY(x) … #define C_0007C0_RSIU_BUSY … #define S_0007C0_RCIU_BUSY(x) … #define G_0007C0_RCIU_BUSY(x) … #define C_0007C0_RCIU_BUSY … #define S_0007C0_CSF_PRIMARY_BUSY(x) … #define G_0007C0_CSF_PRIMARY_BUSY(x) … #define C_0007C0_CSF_PRIMARY_BUSY … #define S_0007C0_CSF_INDIRECT_BUSY(x) … #define G_0007C0_CSF_INDIRECT_BUSY(x) … #define C_0007C0_CSF_INDIRECT_BUSY … #define S_0007C0_CSQ_PRIMARY_BUSY(x) … #define G_0007C0_CSQ_PRIMARY_BUSY(x) … #define C_0007C0_CSQ_PRIMARY_BUSY … #define S_0007C0_CSQ_INDIRECT_BUSY(x) … #define G_0007C0_CSQ_INDIRECT_BUSY(x) … #define C_0007C0_CSQ_INDIRECT_BUSY … #define S_0007C0_CSI_BUSY(x) … #define G_0007C0_CSI_BUSY(x) … #define C_0007C0_CSI_BUSY … #define S_0007C0_CSF_INDIRECT2_BUSY(x) … #define G_0007C0_CSF_INDIRECT2_BUSY(x) … #define C_0007C0_CSF_INDIRECT2_BUSY … #define S_0007C0_CSQ_INDIRECT2_BUSY(x) … #define G_0007C0_CSQ_INDIRECT2_BUSY(x) … #define C_0007C0_CSQ_INDIRECT2_BUSY … #define S_0007C0_GUIDMA_BUSY(x) … #define G_0007C0_GUIDMA_BUSY(x) … #define C_0007C0_GUIDMA_BUSY … #define S_0007C0_VIDDMA_BUSY(x) … #define G_0007C0_VIDDMA_BUSY(x) … #define C_0007C0_VIDDMA_BUSY … #define S_0007C0_CMDSTRM_BUSY(x) … #define G_0007C0_CMDSTRM_BUSY(x) … #define C_0007C0_CMDSTRM_BUSY … #define S_0007C0_CP_BUSY(x) … #define G_0007C0_CP_BUSY(x) … #define C_0007C0_CP_BUSY … #define R_000E40_RBBM_STATUS … #define S_000E40_CMDFIFO_AVAIL(x) … #define G_000E40_CMDFIFO_AVAIL(x) … #define C_000E40_CMDFIFO_AVAIL … #define S_000E40_HIRQ_ON_RBB(x) … #define G_000E40_HIRQ_ON_RBB(x) … #define C_000E40_HIRQ_ON_RBB … #define S_000E40_CPRQ_ON_RBB(x) … #define G_000E40_CPRQ_ON_RBB(x) … #define C_000E40_CPRQ_ON_RBB … #define S_000E40_CFRQ_ON_RBB(x) … #define G_000E40_CFRQ_ON_RBB(x) … #define C_000E40_CFRQ_ON_RBB … #define S_000E40_HIRQ_IN_RTBUF(x) … #define G_000E40_HIRQ_IN_RTBUF(x) … #define C_000E40_HIRQ_IN_RTBUF … #define S_000E40_CPRQ_IN_RTBUF(x) … #define G_000E40_CPRQ_IN_RTBUF(x) … #define C_000E40_CPRQ_IN_RTBUF … #define S_000E40_CFRQ_IN_RTBUF(x) … #define G_000E40_CFRQ_IN_RTBUF(x) … #define C_000E40_CFRQ_IN_RTBUF … #define S_000E40_CF_PIPE_BUSY(x) … #define G_000E40_CF_PIPE_BUSY(x) … #define C_000E40_CF_PIPE_BUSY … #define S_000E40_ENG_EV_BUSY(x) … #define G_000E40_ENG_EV_BUSY(x) … #define C_000E40_ENG_EV_BUSY … #define S_000E40_CP_CMDSTRM_BUSY(x) … #define G_000E40_CP_CMDSTRM_BUSY(x) … #define C_000E40_CP_CMDSTRM_BUSY … #define S_000E40_E2_BUSY(x) … #define G_000E40_E2_BUSY(x) … #define C_000E40_E2_BUSY … #define S_000E40_RB2D_BUSY(x) … #define G_000E40_RB2D_BUSY(x) … #define C_000E40_RB2D_BUSY … #define S_000E40_RB3D_BUSY(x) … #define G_000E40_RB3D_BUSY(x) … #define C_000E40_RB3D_BUSY … #define S_000E40_VAP_BUSY(x) … #define G_000E40_VAP_BUSY(x) … #define C_000E40_VAP_BUSY … #define S_000E40_RE_BUSY(x) … #define G_000E40_RE_BUSY(x) … #define C_000E40_RE_BUSY … #define S_000E40_TAM_BUSY(x) … #define G_000E40_TAM_BUSY(x) … #define C_000E40_TAM_BUSY … #define S_000E40_TDM_BUSY(x) … #define G_000E40_TDM_BUSY(x) … #define C_000E40_TDM_BUSY … #define S_000E40_PB_BUSY(x) … #define G_000E40_PB_BUSY(x) … #define C_000E40_PB_BUSY … #define S_000E40_TIM_BUSY(x) … #define G_000E40_TIM_BUSY(x) … #define C_000E40_TIM_BUSY … #define S_000E40_GA_BUSY(x) … #define G_000E40_GA_BUSY(x) … #define C_000E40_GA_BUSY … #define S_000E40_CBA2D_BUSY(x) … #define G_000E40_CBA2D_BUSY(x) … #define C_000E40_CBA2D_BUSY … #define S_000E40_RBBM_HIBUSY(x) … #define G_000E40_RBBM_HIBUSY(x) … #define C_000E40_RBBM_HIBUSY … #define S_000E40_SKID_CFBUSY(x) … #define G_000E40_SKID_CFBUSY(x) … #define C_000E40_SKID_CFBUSY … #define S_000E40_VAP_VF_BUSY(x) … #define G_000E40_VAP_VF_BUSY(x) … #define C_000E40_VAP_VF_BUSY … #define S_000E40_GUI_ACTIVE(x) … #define G_000E40_GUI_ACTIVE(x) … #define C_000E40_GUI_ACTIVE … #define R_006080_D1CRTC_CONTROL … #define S_006080_D1CRTC_MASTER_EN(x) … #define G_006080_D1CRTC_MASTER_EN(x) … #define C_006080_D1CRTC_MASTER_EN … #define S_006080_D1CRTC_SYNC_RESET_SEL(x) … #define G_006080_D1CRTC_SYNC_RESET_SEL(x) … #define C_006080_D1CRTC_SYNC_RESET_SEL … #define S_006080_D1CRTC_DISABLE_POINT_CNTL(x) … #define G_006080_D1CRTC_DISABLE_POINT_CNTL(x) … #define C_006080_D1CRTC_DISABLE_POINT_CNTL … #define S_006080_D1CRTC_CURRENT_MASTER_EN_STATE(x) … #define G_006080_D1CRTC_CURRENT_MASTER_EN_STATE(x) … #define C_006080_D1CRTC_CURRENT_MASTER_EN_STATE … #define S_006080_D1CRTC_DISP_READ_REQUEST_DISABLE(x) … #define G_006080_D1CRTC_DISP_READ_REQUEST_DISABLE(x) … #define C_006080_D1CRTC_DISP_READ_REQUEST_DISABLE … #define R_0060E8_D1CRTC_UPDATE_LOCK … #define S_0060E8_D1CRTC_UPDATE_LOCK(x) … #define G_0060E8_D1CRTC_UPDATE_LOCK(x) … #define C_0060E8_D1CRTC_UPDATE_LOCK … #define R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS … #define S_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS(x) … #define G_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS(x) … #define C_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS … #define R_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS … #define S_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS(x) … #define G_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS(x) … #define C_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS … #define R_006880_D2CRTC_CONTROL … #define S_006880_D2CRTC_MASTER_EN(x) … #define G_006880_D2CRTC_MASTER_EN(x) … #define C_006880_D2CRTC_MASTER_EN … #define S_006880_D2CRTC_SYNC_RESET_SEL(x) … #define G_006880_D2CRTC_SYNC_RESET_SEL(x) … #define C_006880_D2CRTC_SYNC_RESET_SEL … #define S_006880_D2CRTC_DISABLE_POINT_CNTL(x) … #define G_006880_D2CRTC_DISABLE_POINT_CNTL(x) … #define C_006880_D2CRTC_DISABLE_POINT_CNTL … #define S_006880_D2CRTC_CURRENT_MASTER_EN_STATE(x) … #define G_006880_D2CRTC_CURRENT_MASTER_EN_STATE(x) … #define C_006880_D2CRTC_CURRENT_MASTER_EN_STATE … #define S_006880_D2CRTC_DISP_READ_REQUEST_DISABLE(x) … #define G_006880_D2CRTC_DISP_READ_REQUEST_DISABLE(x) … #define C_006880_D2CRTC_DISP_READ_REQUEST_DISABLE … #define R_0068E8_D2CRTC_UPDATE_LOCK … #define S_0068E8_D2CRTC_UPDATE_LOCK(x) … #define G_0068E8_D2CRTC_UPDATE_LOCK(x) … #define C_0068E8_D2CRTC_UPDATE_LOCK … #define R_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS … #define S_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS(x) … #define G_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS(x) … #define C_006910_D2GRPH_PRIMARY_SURFACE_ADDRESS … #define R_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS … #define S_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS(x) … #define G_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS(x) … #define C_006918_D2GRPH_SECONDARY_SURFACE_ADDRESS … #define R_000001_MC_FB_LOCATION … #define S_000001_MC_FB_START(x) … #define G_000001_MC_FB_START(x) … #define C_000001_MC_FB_START … #define S_000001_MC_FB_TOP(x) … #define G_000001_MC_FB_TOP(x) … #define C_000001_MC_FB_TOP … #define R_000002_MC_AGP_LOCATION … #define S_000002_MC_AGP_START(x) … #define G_000002_MC_AGP_START(x) … #define C_000002_MC_AGP_START … #define S_000002_MC_AGP_TOP(x) … #define G_000002_MC_AGP_TOP(x) … #define C_000002_MC_AGP_TOP … #define R_000003_MC_AGP_BASE … #define S_000003_AGP_BASE_ADDR(x) … #define G_000003_AGP_BASE_ADDR(x) … #define C_000003_AGP_BASE_ADDR … #define R_000004_MC_AGP_BASE_2 … #define S_000004_AGP_BASE_ADDR_2(x) … #define G_000004_AGP_BASE_ADDR_2(x) … #define C_000004_AGP_BASE_ADDR_2 … #define R_00000F_CP_DYN_CNTL … #define S_00000F_CP_FORCEON(x) … #define G_00000F_CP_FORCEON(x) … #define C_00000F_CP_FORCEON … #define S_00000F_CP_MAX_DYN_STOP_LAT(x) … #define G_00000F_CP_MAX_DYN_STOP_LAT(x) … #define C_00000F_CP_MAX_DYN_STOP_LAT … #define S_00000F_CP_CLOCK_STATUS(x) … #define G_00000F_CP_CLOCK_STATUS(x) … #define C_00000F_CP_CLOCK_STATUS … #define S_00000F_CP_PROG_SHUTOFF(x) … #define G_00000F_CP_PROG_SHUTOFF(x) … #define C_00000F_CP_PROG_SHUTOFF … #define S_00000F_CP_PROG_DELAY_VALUE(x) … #define G_00000F_CP_PROG_DELAY_VALUE(x) … #define C_00000F_CP_PROG_DELAY_VALUE … #define S_00000F_CP_LOWER_POWER_IDLE(x) … #define G_00000F_CP_LOWER_POWER_IDLE(x) … #define C_00000F_CP_LOWER_POWER_IDLE … #define S_00000F_CP_LOWER_POWER_IGNORE(x) … #define G_00000F_CP_LOWER_POWER_IGNORE(x) … #define C_00000F_CP_LOWER_POWER_IGNORE … #define S_00000F_CP_NORMAL_POWER_IGNORE(x) … #define G_00000F_CP_NORMAL_POWER_IGNORE(x) … #define C_00000F_CP_NORMAL_POWER_IGNORE … #define S_00000F_SPARE(x) … #define G_00000F_SPARE(x) … #define C_00000F_SPARE … #define S_00000F_CP_NORMAL_POWER_BUSY(x) … #define G_00000F_CP_NORMAL_POWER_BUSY(x) … #define C_00000F_CP_NORMAL_POWER_BUSY … #define R_000011_E2_DYN_CNTL … #define S_000011_E2_FORCEON(x) … #define G_000011_E2_FORCEON(x) … #define C_000011_E2_FORCEON … #define S_000011_E2_MAX_DYN_STOP_LAT(x) … #define G_000011_E2_MAX_DYN_STOP_LAT(x) … #define C_000011_E2_MAX_DYN_STOP_LAT … #define S_000011_E2_CLOCK_STATUS(x) … #define G_000011_E2_CLOCK_STATUS(x) … #define C_000011_E2_CLOCK_STATUS … #define S_000011_E2_PROG_SHUTOFF(x) … #define G_000011_E2_PROG_SHUTOFF(x) … #define C_000011_E2_PROG_SHUTOFF … #define S_000011_E2_PROG_DELAY_VALUE(x) … #define G_000011_E2_PROG_DELAY_VALUE(x) … #define C_000011_E2_PROG_DELAY_VALUE … #define S_000011_E2_LOWER_POWER_IDLE(x) … #define G_000011_E2_LOWER_POWER_IDLE(x) … #define C_000011_E2_LOWER_POWER_IDLE … #define S_000011_E2_LOWER_POWER_IGNORE(x) … #define G_000011_E2_LOWER_POWER_IGNORE(x) … #define C_000011_E2_LOWER_POWER_IGNORE … #define S_000011_E2_NORMAL_POWER_IGNORE(x) … #define G_000011_E2_NORMAL_POWER_IGNORE(x) … #define C_000011_E2_NORMAL_POWER_IGNORE … #define S_000011_SPARE(x) … #define G_000011_SPARE(x) … #define C_000011_SPARE … #define S_000011_E2_NORMAL_POWER_BUSY(x) … #define G_000011_E2_NORMAL_POWER_BUSY(x) … #define C_000011_E2_NORMAL_POWER_BUSY … #define R_000013_IDCT_DYN_CNTL … #define S_000013_IDCT_FORCEON(x) … #define G_000013_IDCT_FORCEON(x) … #define C_000013_IDCT_FORCEON … #define S_000013_IDCT_MAX_DYN_STOP_LAT(x) … #define G_000013_IDCT_MAX_DYN_STOP_LAT(x) … #define C_000013_IDCT_MAX_DYN_STOP_LAT … #define S_000013_IDCT_CLOCK_STATUS(x) … #define G_000013_IDCT_CLOCK_STATUS(x) … #define C_000013_IDCT_CLOCK_STATUS … #define S_000013_IDCT_PROG_SHUTOFF(x) … #define G_000013_IDCT_PROG_SHUTOFF(x) … #define C_000013_IDCT_PROG_SHUTOFF … #define S_000013_IDCT_PROG_DELAY_VALUE(x) … #define G_000013_IDCT_PROG_DELAY_VALUE(x) … #define C_000013_IDCT_PROG_DELAY_VALUE … #define S_000013_IDCT_LOWER_POWER_IDLE(x) … #define G_000013_IDCT_LOWER_POWER_IDLE(x) … #define C_000013_IDCT_LOWER_POWER_IDLE … #define S_000013_IDCT_LOWER_POWER_IGNORE(x) … #define G_000013_IDCT_LOWER_POWER_IGNORE(x) … #define C_000013_IDCT_LOWER_POWER_IGNORE … #define S_000013_IDCT_NORMAL_POWER_IGNORE(x) … #define G_000013_IDCT_NORMAL_POWER_IGNORE(x) … #define C_000013_IDCT_NORMAL_POWER_IGNORE … #define S_000013_SPARE(x) … #define G_000013_SPARE(x) … #define C_000013_SPARE … #define S_000013_IDCT_NORMAL_POWER_BUSY(x) … #define G_000013_IDCT_NORMAL_POWER_BUSY(x) … #define C_000013_IDCT_NORMAL_POWER_BUSY … #endif
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