linux/drivers/gpu/drm/radeon/evergreen_cs.c

/*
 * Copyright 2010 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 * Copyright 2009 Jerome Glisse.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Dave Airlie
 *          Alex Deucher
 *          Jerome Glisse
 */

#include "radeon.h"
#include "radeon_asic.h"
#include "r600.h"
#include "evergreend.h"
#include "evergreen_reg_safe.h"
#include "cayman_reg_safe.h"

#ifndef MIN
#define MAX …
#define MIN …
#endif

#define REG_SAFE_BM_SIZE …

struct evergreen_cs_track { … };

static u32 evergreen_cs_get_aray_mode(u32 tiling_flags)
{ … }

static u32 evergreen_cs_get_num_banks(u32 nbanks)
{ … }

static void evergreen_cs_track_init(struct evergreen_cs_track *track)
{ … }

struct eg_surface { … };

static int evergreen_surface_check_linear(struct radeon_cs_parser *p,
					  struct eg_surface *surf,
					  const char *prefix)
{ … }

static int evergreen_surface_check_linear_aligned(struct radeon_cs_parser *p,
						  struct eg_surface *surf,
						  const char *prefix)
{ … }

static int evergreen_surface_check_1d(struct radeon_cs_parser *p,
				      struct eg_surface *surf,
				      const char *prefix)
{ … }

static int evergreen_surface_check_2d(struct radeon_cs_parser *p,
				      struct eg_surface *surf,
				      const char *prefix)
{ … }

static int evergreen_surface_check(struct radeon_cs_parser *p,
				   struct eg_surface *surf,
				   const char *prefix)
{ … }

static int evergreen_surface_value_conv_check(struct radeon_cs_parser *p,
					      struct eg_surface *surf,
					      const char *prefix)
{ … }

static int evergreen_cs_track_validate_cb(struct radeon_cs_parser *p, unsigned id)
{ … }

static int evergreen_cs_track_validate_htile(struct radeon_cs_parser *p,
						unsigned nbx, unsigned nby)
{ … }

static int evergreen_cs_track_validate_stencil(struct radeon_cs_parser *p)
{ … }

static int evergreen_cs_track_validate_depth(struct radeon_cs_parser *p)
{ … }

static int evergreen_cs_track_validate_texture(struct radeon_cs_parser *p,
					       struct radeon_bo *texture,
					       struct radeon_bo *mipmap,
					       unsigned idx)
{ … }

static int evergreen_cs_track_check(struct radeon_cs_parser *p)
{ … }

/**
 * evergreen_cs_packet_parse_vline() - parse userspace VLINE packet
 * @p:		parser structure holding parsing context.
 *
 * This is an Evergreen(+)-specific function for parsing VLINE packets.
 * Real work is done by r600_cs_common_vline_parse function.
 * Here we just set up ASIC-specific register table and call
 * the common implementation function.
 */
static int evergreen_cs_packet_parse_vline(struct radeon_cs_parser *p)
{ … }

static int evergreen_packet0_check(struct radeon_cs_parser *p,
				   struct radeon_cs_packet *pkt,
				   unsigned idx, unsigned reg)
{ … }

static int evergreen_cs_parse_packet0(struct radeon_cs_parser *p,
				      struct radeon_cs_packet *pkt)
{ … }

/**
 * evergreen_cs_handle_reg() - process registers that need special handling.
 * @p: parser structure holding parsing context
 * @reg: register we are testing
 * @idx: index into the cs buffer
 */
static int evergreen_cs_handle_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
{ … }

/**
 * evergreen_is_safe_reg() - check if register is authorized or not
 * @p: parser structure holding parsing context
 * @reg: register we are testing
 *
 * This function will test against reg_safe_bm and return true
 * if register is safe or false otherwise.
 */
static inline bool evergreen_is_safe_reg(struct radeon_cs_parser *p, u32 reg)
{ … }

static int evergreen_packet3_check(struct radeon_cs_parser *p,
				   struct radeon_cs_packet *pkt)
{ … }

int evergreen_cs_parse(struct radeon_cs_parser *p)
{ … }

/**
 * evergreen_dma_cs_parse() - parse the DMA IB
 * @p:		parser structure holding parsing context.
 *
 * Parses the DMA IB from the CS ioctl and updates
 * the GPU addresses based on the reloc information and
 * checks for errors. (Evergreen-Cayman)
 * Returns 0 for success and an error on failure.
 **/
int evergreen_dma_cs_parse(struct radeon_cs_parser *p)
{ … }

/* vm parser */
static bool evergreen_vm_reg_valid(u32 reg)
{ … }

static int evergreen_vm_packet3_check(struct radeon_device *rdev,
				      u32 *ib, struct radeon_cs_packet *pkt)
{ … }

int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib)
{ … }

/**
 * evergreen_dma_ib_parse() - parse the DMA IB for VM
 * @rdev: radeon_device pointer
 * @ib:	radeon_ib pointer
 *
 * Parses the DMA IB from the VM CS ioctl
 * checks for errors. (Cayman-SI)
 * Returns 0 for success and an error on failure.
 **/
int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib)
{ … }