/* * Copyright 2011 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #ifndef __RS780D_H__ #define __RS780D_H__ #define CG_SPLL_FUNC_CNTL … #define SPLL_RESET … #define SPLL_SLEEP … #define SPLL_REF_DIV(x) … #define SPLL_REF_DIV_MASK … #define SPLL_REF_DIV_SHIFT … #define SPLL_FB_DIV(x) … #define SPLL_FB_DIV_MASK … #define SPLL_FB_DIV_SHIFT … #define SPLL_PULSEEN … #define SPLL_PULSENUM(x) … #define SPLL_PULSENUM_MASK … #define SPLL_SW_HILEN(x) … #define SPLL_SW_HILEN_MASK … #define SPLL_SW_HILEN_SHIFT … #define SPLL_SW_LOLEN(x) … #define SPLL_SW_LOLEN_MASK … #define SPLL_SW_LOLEN_SHIFT … #define SPLL_DIVEN … #define SPLL_BYPASS_EN … #define SPLL_CHG_STATUS … #define SPLL_CTLREQ … #define SPLL_CTLACK … /* RS780/RS880 PM */ #define FVTHROT_CNTRL_REG … #define DONT_WAIT_FOR_FBDIV_WRAP … #define MINIMUM_CIP(x) … #define MINIMUM_CIP_SHIFT … #define MINIMUM_CIP_MASK … #define REFRESH_RATE_DIVISOR(x) … #define REFRESH_RATE_DIVISOR_SHIFT … #define REFRESH_RATE_DIVISOR_MASK … #define ENABLE_FV_THROT … #define ENABLE_FV_UPDATE … #define TREND_SEL_MODE … #define FORCE_TREND_SEL … #define ENABLE_FV_THROT_IO … #define FVTHROT_TARGET_REG … #define TARGET_IDLE_COUNT(x) … #define TARGET_IDLE_COUNT_MASK … #define TARGET_IDLE_COUNT_SHIFT … #define FVTHROT_CB1 … #define FVTHROT_CB2 … #define FVTHROT_CB3 … #define FVTHROT_CB4 … #define FVTHROT_UTC0 … #define FVTHROT_UTC1 … #define FVTHROT_UTC2 … #define FVTHROT_UTC3 … #define FVTHROT_UTC4 … #define FVTHROT_DTC0 … #define FVTHROT_DTC1 … #define FVTHROT_DTC2 … #define FVTHROT_DTC3 … #define FVTHROT_DTC4 … #define FVTHROT_FBDIV_REG0 … #define MIN_FEEDBACK_DIV(x) … #define MIN_FEEDBACK_DIV_MASK … #define MIN_FEEDBACK_DIV_SHIFT … #define MAX_FEEDBACK_DIV(x) … #define MAX_FEEDBACK_DIV_MASK … #define MAX_FEEDBACK_DIV_SHIFT … #define FVTHROT_FBDIV_REG1 … #define MAX_FEEDBACK_STEP(x) … #define MAX_FEEDBACK_STEP_MASK … #define MAX_FEEDBACK_STEP_SHIFT … #define STARTING_FEEDBACK_DIV(x) … #define STARTING_FEEDBACK_DIV_MASK … #define STARTING_FEEDBACK_DIV_SHIFT … #define FORCE_FEEDBACK_DIV … #define FVTHROT_FBDIV_REG2 … #define FORCED_FEEDBACK_DIV(x) … #define FORCED_FEEDBACK_DIV_MASK … #define FORCED_FEEDBACK_DIV_SHIFT … #define FB_DIV_TIMER_VAL(x) … #define FB_DIV_TIMER_VAL_MASK … #define FB_DIV_TIMER_VAL_SHIFT … #define FVTHROT_FB_US_REG0 … #define FVTHROT_FB_US_REG1 … #define FVTHROT_FB_DS_REG0 … #define FVTHROT_FB_DS_REG1 … #define FVTHROT_PWM_CTRL_REG0 … #define STARTING_PWM_HIGHTIME(x) … #define STARTING_PWM_HIGHTIME_MASK … #define STARTING_PWM_HIGHTIME_SHIFT … #define NUMBER_OF_CYCLES_IN_PERIOD(x) … #define NUMBER_OF_CYCLES_IN_PERIOD_MASK … #define NUMBER_OF_CYCLES_IN_PERIOD_SHIFT … #define FORCE_STARTING_PWM_HIGHTIME … #define INVERT_PWM_WAVEFORM … #define FVTHROT_PWM_CTRL_REG1 … #define MIN_PWM_HIGHTIME(x) … #define MIN_PWM_HIGHTIME_MASK … #define MIN_PWM_HIGHTIME_SHIFT … #define MAX_PWM_HIGHTIME(x) … #define MAX_PWM_HIGHTIME_MASK … #define MAX_PWM_HIGHTIME_SHIFT … #define FVTHROT_PWM_US_REG0 … #define FVTHROT_PWM_US_REG1 … #define FVTHROT_PWM_DS_REG0 … #define FVTHROT_PWM_DS_REG1 … #define FVTHROT_STATUS_REG0 … #define CURRENT_FEEDBACK_DIV_MASK … #define CURRENT_FEEDBACK_DIV_SHIFT … #define FVTHROT_STATUS_REG1 … #define FVTHROT_STATUS_REG2 … #define CG_INTGFX_MISC … #define FVTHROT_VBLANK_SEL … #define FVTHROT_PWM_FEEDBACK_DIV_REG1 … #define RANGE0_PWM_FEEDBACK_DIV(x) … #define RANGE0_PWM_FEEDBACK_DIV_MASK … #define RANGE0_PWM_FEEDBACK_DIV_SHIFT … #define RANGE_PWM_FEEDBACK_DIV_EN … #define FVTHROT_PWM_FEEDBACK_DIV_REG2 … #define RANGE1_PWM_FEEDBACK_DIV(x) … #define RANGE1_PWM_FEEDBACK_DIV_MASK … #define RANGE1_PWM_FEEDBACK_DIV_SHIFT … #define RANGE2_PWM_FEEDBACK_DIV(x) … #define RANGE2_PWM_FEEDBACK_DIV_MASK … #define RANGE2_PWM_FEEDBACK_DIV_SHIFT … #define FVTHROT_PWM_FEEDBACK_DIV_REG3 … #define RANGE0_PWM(x) … #define RANGE0_PWM_MASK … #define RANGE0_PWM_SHIFT … #define RANGE1_PWM(x) … #define RANGE1_PWM_MASK … #define RANGE1_PWM_SHIFT … #define FVTHROT_PWM_FEEDBACK_DIV_REG4 … #define RANGE2_PWM(x) … #define RANGE2_PWM_MASK … #define RANGE2_PWM_SHIFT … #define RANGE3_PWM(x) … #define RANGE3_PWM_MASK … #define RANGE3_PWM_SHIFT … #define FVTHROT_SLOW_CLK_FEEDBACK_DIV_REG1 … #define RANGE0_SLOW_CLK_FEEDBACK_DIV(x) … #define RANGE0_SLOW_CLK_FEEDBACK_DIV_MASK … #define RANGE0_SLOW_CLK_FEEDBACK_DIV_SHIFT … #define RANGE_SLOW_CLK_FEEDBACK_DIV_EN … #define GFX_MACRO_BYPASS_CNTL … #define SPLL_BYPASS_CNTL … #define UPLL_BYPASS_CNTL … #endif
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